Calculated based on number of publications stored in Pure and citations from Scopus
1995 …2021

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  • 2009

    1.2V 1.6Gb/s 56nm 6F2 4Gb DDR3 SDRAM with hybrid-I/O sense amplifier and segmented sub-array architecture

    Moon, Y., Cho, Y. H., Lee, H. B., Jeong, B. H., Hyun, S. H., Kim, B. C., Jeong, I. C., Seo, S. Y., Shin, J. H., Choi, S. W., Song, H. S., Choi, J. H., Kyung, K. H., Jun, Y. H. & Kim, K., 2009, 2009 IEEE International Solid-State Circuits Conference - Digest of Technical Papers, ISSCC 2009. 4977341. (Digest of Technical Papers - IEEE International Solid-State Circuits Conference).

    Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

    23 Scopus citations
  • 2008

    Presetting pulse-based flip-flop

    Kim, C. S., Kim, J. S., Kong, B. S., Moon, Y. & Jun, Y. H., 2008, 2008 IEEE International Symposium on Circuits and Systems, ISCAS 2008. p. 588-591 4 p. 4541486. (Proceedings - IEEE International Symposium on Circuits and Systems).

    Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

    10 Scopus citations
  • 2007

    A dual PFD phase rotating multi-phase PLL for 5Gbps PCI express Gen2 multi-lane serial link receiver in 0.13um CMOS

    Kim, S., Lee, D., Park, Y. S., Moon, Y. & Shim, D., 2007, 2007 Symposium on VLSI Circuits, VLSIC - Digest of Technical Papers. p. 234-235 2 p. 4342732. (IEEE Symposium on VLSI Circuits, Digest of Technical Papers).

    Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

    12 Scopus citations
  • 2006

    A multiphase delay-locked loop for 0.125-2Gbps 0.18μm CMOS transmitter

    Moon, Y. & Shim, D., 2006, 2006 Symposium on VLSI Circuits, VLSIC - Digest of Technical Papers. p. 35-36 2 p. 1705299. (IEEE Symposium on VLSI Circuits, Digest of Technical Papers).

    Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

  • A quad 6Gb/s multi-rate CMOS transceiver with TX rise/fall-time control

    Moon, Y., Ahn, G., Choi, H., Kim, N. & Shim, D., 2006, 2006 IEEE International Solid-State Circuits Conference, ISSCC - Digest of Technical Papers. p. 84+79 1696053. (Digest of Technical Papers - IEEE International Solid-State Circuits Conference).

    Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

    17 Scopus citations
  • 1999

    62.5-250 MHz multi-phase delay-locked loop using a replica delay line with triply controlled delay cells

    Moon, Y., Choi, J., Lee, K., Jeong, D. K. & Kim, M. K., 1999, Proceedings of the Custom Integrated Circuits Conference. IEEE, p. 299-302 4 p. (Proceedings of the Custom Integrated Circuits Conference).

    Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

    3 Scopus citations