@inproceedings{b23cb3b2de67458fadac0d47b16fe8c5,
title = "1.2V 1.6Gb/s 56nm 6F2 4Gb DDR3 SDRAM with hybrid-I/O sense amplifier and segmented sub-array architecture",
author = "Yongsam Moon and Cho, \{Yong Ho\} and Lee, \{Hyun Bae\} and Jeong, \{Byung Hoon\} and Hyun, \{Seok Hun\} and Kim, \{Byung Chul\} and Jeong, \{In Chul\} and Seo, \{Seong Young\} and Shin, \{Jun Ho\} and Choi, \{Seok Woo\} and Song, \{Ho Sung\} and Choi, \{Jung Hwan\} and Kyung, \{Kye Hyun\} and Jun, \{Young Hyun\} and Kinam Kim",
year = "2009",
doi = "10.1109/ISSCC.2009.4977341",
language = "English",
isbn = "1424434580",
series = "Digest of Technical Papers - IEEE International Solid-State Circuits Conference",
booktitle = "2009 IEEE International Solid-State Circuits Conference - Digest of Technical Papers, ISSCC 2009",
note = "2009 IEEE International Solid-State Circuits Conference ISSCC 2009 ; Conference date: 08-02-2009 Through 12-02-2009",
}