3-D floating-gate synapse array with spike-time-dependent plasticity

Hyun Seok Choi; Dae Hoon Wee; Hyungjin Kim; Sungjun Kim; Kyung Chang Ryoo; Byung Gook Park; Yoon Kim

doi:10.1109/TED.2017.2775233

3-D floating-gate synapse array with spike-time-dependent plasticity

Hyun Seok Choi, Dae Hoon Wee, Hyungjin Kim, Sungjun Kim, Kyung Chang Ryoo, Byung Gook Park, Yoon Kim

School of Electrical and Computer Engineering

Research output: Contribution to journal › Article › peer-review

32 Scopus citations

Abstract

This paper proposes a 3-D floating-gate (FG) synapse array for neuromorphic applications. The designed device has certain advantages over previous planar FG synapse devices: a smaller cell size due to the stacked structure and smaller operation voltage by the gate-allaround geometry. In addition, the operation method to implement spike time-dependent plasticity is proposed and demonstrated. The proposed array based on commercialized flash memory technology is expected be one of the most promising candidate architecture for neuromorphic applications.

Original language	English
Pages (from-to)	101-107
Number of pages	7
Journal	IEEE Transactions on Electron Devices
Volume	65
Issue number	1
DOIs	https://doi.org/10.1109/TED.2017.2775233
State	Published - Jan 2018

Keywords

Floating-gate (FG) synapse
Neuromorphic device
Spike time-dependent plasticity (STDP)
Synapse device

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10.1109/TED.2017.2775233

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@article{0dbcabe9c9374c8aa4cc349da2d37179,

title = "3-D floating-gate synapse array with spike-time-dependent plasticity",

abstract = "This paper proposes a 3-D floating-gate (FG) synapse array for neuromorphic applications. The designed device has certain advantages over previous planar FG synapse devices: a smaller cell size due to the stacked structure and smaller operation voltage by the gate-allaround geometry. In addition, the operation method to implement spike time-dependent plasticity is proposed and demonstrated. The proposed array based on commercialized flash memory technology is expected be one of the most promising candidate architecture for neuromorphic applications.",

keywords = "Floating-gate (FG) synapse, Neuromorphic device, Spike time-dependent plasticity (STDP), Synapse device",

author = "Choi, \{Hyun Seok\} and Wee, \{Dae Hoon\} and Hyungjin Kim and Sungjun Kim and Ryoo, \{Kyung Chang\} and Park, \{Byung Gook\} and Yoon Kim",

note = "Publisher Copyright: {\textcopyright} 2017 IEEE.",

year = "2018",

month = jan,

doi = "10.1109/TED.2017.2775233",

language = "English",

volume = "65",

pages = "101--107",

journal = "IEEE Transactions on Electron Devices",

issn = "0018-9383",

publisher = "Institute of Electrical and Electronics Engineers Inc.",

number = "1",

}

TY - JOUR

T1 - 3-D floating-gate synapse array with spike-time-dependent plasticity

AU - Choi, Hyun Seok

AU - Wee, Dae Hoon

AU - Kim, Hyungjin

AU - Kim, Sungjun

AU - Ryoo, Kyung Chang

AU - Park, Byung Gook

AU - Kim, Yoon

PY - 2018/1

Y1 - 2018/1

N2 - This paper proposes a 3-D floating-gate (FG) synapse array for neuromorphic applications. The designed device has certain advantages over previous planar FG synapse devices: a smaller cell size due to the stacked structure and smaller operation voltage by the gate-allaround geometry. In addition, the operation method to implement spike time-dependent plasticity is proposed and demonstrated. The proposed array based on commercialized flash memory technology is expected be one of the most promising candidate architecture for neuromorphic applications.

AB - This paper proposes a 3-D floating-gate (FG) synapse array for neuromorphic applications. The designed device has certain advantages over previous planar FG synapse devices: a smaller cell size due to the stacked structure and smaller operation voltage by the gate-allaround geometry. In addition, the operation method to implement spike time-dependent plasticity is proposed and demonstrated. The proposed array based on commercialized flash memory technology is expected be one of the most promising candidate architecture for neuromorphic applications.

KW - Floating-gate (FG) synapse

KW - Neuromorphic device

KW - Spike time-dependent plasticity (STDP)

KW - Synapse device

UR - https://www.scopus.com/pages/publications/85037672468

U2 - 10.1109/TED.2017.2775233

DO - 10.1109/TED.2017.2775233

M3 - Article

AN - SCOPUS:85037672468

SN - 0018-9383

VL - 65

SP - 101

EP - 107

JO - IEEE Transactions on Electron Devices

JF - IEEE Transactions on Electron Devices

IS - 1

ER -

3-D floating-gate synapse array with spike-time-dependent plasticity

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Keywords

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