A 16-bit sigma-delta A/D converter with high-performance operational amplifiers

Joongho Choi; Bing J. Sheu; Bang W. Lee

doi:10.1007/BF01239245

A 16-bit sigma-delta A/D converter with high-performance operational amplifiers

Joongho Choi, Bing J. Sheu, Bang W. Lee

School of Electrical and Computer Engineering

University of Southern California

Research output: Contribution to journal › Article › peer-review

7 Scopus citations

Abstract

A fourth-order interpolative modulator was designed and fabricated in a 2-μm CMOS technology. As a key building block, a fully-differential folded-cascode operational amplifier has been developed and successfully tested. The main design emphasis is placed on achieving a fast settling behavior. The fully-differential analog modulator operates at the rate of 5.12 MHz and provides a signal-to-noise ratio higher than 96 dB for 16-bit analog-to-digital conversion.

Original language	English
Pages (from-to)	105-119
Number of pages	15
Journal	Analog Integrated Circuits and Signal Processing
Volume	6
Issue number	2
DOIs	https://doi.org/10.1007/BF01239245
State	Published - Sep 1994

Access to Document

10.1007/BF01239245

Cite this

@article{eed2dad09e3b433494581d0c400fa221,

title = "A 16-bit sigma-delta A/D converter with high-performance operational amplifiers",

abstract = "A fourth-order interpolative modulator was designed and fabricated in a 2-μm CMOS technology. As a key building block, a fully-differential folded-cascode operational amplifier has been developed and successfully tested. The main design emphasis is placed on achieving a fast settling behavior. The fully-differential analog modulator operates at the rate of 5.12 MHz and provides a signal-to-noise ratio higher than 96 dB for 16-bit analog-to-digital conversion.",

author = "Joongho Choi and Sheu, {Bing J.} and Lee, {Bang W.}",

year = "1994",

month = sep,

doi = "10.1007/BF01239245",

language = "English",

volume = "6",

pages = "105--119",

journal = "Analog Integrated Circuits and Signal Processing",

issn = "0925-1030",

publisher = "Springer Netherlands",

number = "2",

}

TY - JOUR

T1 - A 16-bit sigma-delta A/D converter with high-performance operational amplifiers

AU - Choi, Joongho

AU - Sheu, Bing J.

AU - Lee, Bang W.

PY - 1994/9

Y1 - 1994/9

N2 - A fourth-order interpolative modulator was designed and fabricated in a 2-μm CMOS technology. As a key building block, a fully-differential folded-cascode operational amplifier has been developed and successfully tested. The main design emphasis is placed on achieving a fast settling behavior. The fully-differential analog modulator operates at the rate of 5.12 MHz and provides a signal-to-noise ratio higher than 96 dB for 16-bit analog-to-digital conversion.

AB - A fourth-order interpolative modulator was designed and fabricated in a 2-μm CMOS technology. As a key building block, a fully-differential folded-cascode operational amplifier has been developed and successfully tested. The main design emphasis is placed on achieving a fast settling behavior. The fully-differential analog modulator operates at the rate of 5.12 MHz and provides a signal-to-noise ratio higher than 96 dB for 16-bit analog-to-digital conversion.

UR - http://www.scopus.com/inward/record.url?scp=0028498167&partnerID=8YFLogxK

U2 - 10.1007/BF01239245

DO - 10.1007/BF01239245

M3 - Article

AN - SCOPUS:0028498167

SN - 0925-1030

VL - 6

SP - 105

EP - 119

JO - Analog Integrated Circuits and Signal Processing

JF - Analog Integrated Circuits and Signal Processing

IS - 2

ER -

A 16-bit sigma-delta A/D converter with high-performance operational amplifiers

Abstract

Access to Document

Other files and links

Fingerprint

Cite this