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A 184dB-FoMS 25kHz-BW 98.6dB-SNDR Fully Dynamic Discrete-Time Delta-Sigma Modulator with Digital Noise Coupling

  • Young Hun Moon
  • , Kun Woo Park
  • , Kwan Hoon Song
  • , Kent Edrian Lozada
  • , Min Jae Seo
  • , Seung Tak Ryu
  • Korea Advanced Institute of Science and Technology

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

1 Scopus citations

Abstract

This paper presents a fully dynamic discrete-time (DT) delta-sigma modulator (DSM) leveraging a floating inverter amplifier (FIA)-based dynamic loop filter and digital noise coupling (DNC) to enhance the power efficiency of the DT DSM for various sensor applications. Fabricated in a 28-nm CMOS process, the proposed architecture achieves 98.6-dB SNDR in 25-kHz bandwidth (BW), while consuming only 71.7 μ W operating at 6.4 MS/s, resulting in Schreier Figure of Merit (FoMS of 184 dB and Walden FoM (FoMW) of 20.6 fJ/conv.-step.

Original languageEnglish
Title of host publication2025 IEEE 68th International Midwest Symposium on Circuits and Systems, MWSCAS 2025
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages5-9
Number of pages5
ISBN (Electronic)9798331589349
DOIs
StatePublished - 2025
Event68th IEEE International Midwest Symposium on Circuits and Systems, MWSCAS 2025 - Lansing/E. Lansing, United States
Duration: 10 Aug 202513 Aug 2025

Publication series

NameMidwest Symposium on Circuits and Systems
ISSN (Print)1548-3746
ISSN (Electronic)1558-3899

Conference

Conference68th IEEE International Midwest Symposium on Circuits and Systems, MWSCAS 2025
Country/TerritoryUnited States
CityLansing/E. Lansing
Period10/08/2513/08/25

Keywords

  • delta-sigma modulator (DSM)
  • digital noise coupling (DNC)
  • Discrete time (DT)
  • floating inverter amplifier (FIA)
  • fully dynamic
  • switched-capacitor (SC) integrator

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