Abstract
A charge trap folded nand (Fnand ) Flash memory device with band-gap-engineered (BE) storage node is proposed. Because of the compact cell layout without junction contacts, a nand Flash memory is the most suitable memory medium for electronic appliances. Two memory cells are put together to have a common vertical channel, which enables one to achieve a theoretical near-30-nm technology. The resulting array is made by folding the conventional 2-D Flash memory and is called Fnand. The memory storage node uses a BE stack structure, where the oxidenitrideoxide multilayers replace the tunnel oxide. The fin structures for both wordline and bitline have been formed by sidewall spacer patterning, instead of photolithography. The fabrication processes for SONONOS nand Flash memory having independent double gates are explained. Electrical characteristics regarding memory operations under paired cell interference are analyzed.
Original language | English |
---|---|
Article number | 5643136 |
Pages (from-to) | 288-295 |
Number of pages | 8 |
Journal | IEEE Transactions on Electron Devices |
Volume | 58 |
Issue number | 2 |
DOIs | |
State | Published - Feb 2011 |
Keywords
- Band-gap engineering
- charge trap
- double gate
- flash memory
- folded nand (F nand)
- paired cell interference (PCI)
- sidewall spacer patterning