A DC-DC converter with adaptive clock control

Subin Kim, Kichang Jang, Chulkyu Park, Joongho Choi

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review


In this paper, the DC-DC converter for adaptive clock control is presented. The proposed adaptive clock control scheme generates a leading edge blanking (LEB) time which is controlled by load current. The DC-DC converter achieves a high efficiency of more than 90% using supply voltages of 1.8 ∼ 3.6V and load currents of 5 ∼ 35mA.

Original languageEnglish
Title of host publicationISOCC 2015 - International SoC Design Conference
Subtitle of host publicationSoC for Internet of Everything (IoE)
PublisherInstitute of Electrical and Electronics Engineers Inc.
Number of pages2
ISBN (Electronic)9781467393089
StatePublished - 8 Feb 2016
Event12th International SoC Design Conference, ISOCC 2015 - Gyeongju, Korea, Republic of
Duration: 2 Nov 20155 Nov 2015

Publication series

NameISOCC 2015 - International SoC Design Conference: SoC for Internet of Everything (IoE)


Conference12th International SoC Design Conference, ISOCC 2015
Country/TerritoryKorea, Republic of


  • DC-DC converter
  • PWM
  • current sensing
  • leading edge blanking


Dive into the research topics of 'A DC-DC converter with adaptive clock control'. Together they form a unique fingerprint.

Cite this