A hardware efficient VLSI implementation of MPEG-4 format conversion filters

Kichul Kim; Jinjong Cha

doi:10.1109/ICVC.1999.820916

A hardware efficient VLSI implementation of MPEG-4 format conversion filters

Kichul Kim, Jinjong Cha

School of Electrical and Computer Engineering

Electronics and Telecommunications Research Institute

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

Abstract

This paper presents a new VLSI design of format conversion filters for MPEG-4 systems. The design provides the functionality of 6 format conversion FIR filters proposed by MPEG-4. The main characteristic of the design is that filter coefficients were selected for efficient VLSI implementation and short design time. By introducing the concept of efficient hardware implementation in the early stage of filter design, it was possible to reduce hardware size and design time considerably. Two full custom VLSIs each containing 3 filters have been designed in three weeks. The design implemented 6 FIR filters with total 85 tabs and 16-bit internal precision using only 150,000 transistors.

Original language	English
Title of host publication	ICVC 1999 - 6th International Conference on VLSI and CAD
Publisher	Institute of Electrical and Electronics Engineers Inc.
Pages	313-316
Number of pages	4
ISBN (Print)	0780357272, 9780780357273
DOIs	https://doi.org/10.1109/ICVC.1999.820916
State	Published - 1999
Event	6th International Conference on VLSI and CAD, ICVC 1999 - Seoul, Korea, Republic of Duration: 26 Oct 1999 → 27 Oct 1999

Publication series

Name	ICVC 1999 - 6th International Conference on VLSI and CAD

Conference

Conference	6th International Conference on VLSI and CAD, ICVC 1999
Country/Territory	Korea, Republic of
City	Seoul
Period	26/10/99 → 27/10/99

Access to Document

10.1109/ICVC.1999.820916

Cite this

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title = "A hardware efficient VLSI implementation of MPEG-4 format conversion filters",

abstract = "This paper presents a new VLSI design of format conversion filters for MPEG-4 systems. The design provides the functionality of 6 format conversion FIR filters proposed by MPEG-4. The main characteristic of the design is that filter coefficients were selected for efficient VLSI implementation and short design time. By introducing the concept of efficient hardware implementation in the early stage of filter design, it was possible to reduce hardware size and design time considerably. Two full custom VLSIs each containing 3 filters have been designed in three weeks. The design implemented 6 FIR filters with total 85 tabs and 16-bit internal precision using only 150,000 transistors.",

author = "Kichul Kim and Jinjong Cha",

note = "Publisher Copyright: {\textcopyright} 1999 IEEE.; 6th International Conference on VLSI and CAD, ICVC 1999 ; Conference date: 26-10-1999 Through 27-10-1999",

year = "1999",

doi = "10.1109/ICVC.1999.820916",

language = "English",

isbn = "0780357272",

series = "ICVC 1999 - 6th International Conference on VLSI and CAD",

publisher = "Institute of Electrical and Electronics Engineers Inc.",

pages = "313--316",

booktitle = "ICVC 1999 - 6th International Conference on VLSI and CAD",

address = "United States",

}

Kim, K & Cha, J 1999, A hardware efficient VLSI implementation of MPEG-4 format conversion filters. in ICVC 1999 - 6th International Conference on VLSI and CAD., 820916, ICVC 1999 - 6th International Conference on VLSI and CAD, Institute of Electrical and Electronics Engineers Inc., pp. 313-316, 6th International Conference on VLSI and CAD, ICVC 1999, Seoul, Korea, Republic of, 26/10/99. https://doi.org/10.1109/ICVC.1999.820916

A hardware efficient VLSI implementation of MPEG-4 format conversion filters. / Kim, Kichul; Cha, Jinjong.
ICVC 1999 - 6th International Conference on VLSI and CAD. Institute of Electrical and Electronics Engineers Inc., 1999. p. 313-316 820916 (ICVC 1999 - 6th International Conference on VLSI and CAD).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

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A hardware efficient VLSI implementation of MPEG-4 format conversion filters

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