A High Gain Vector-Sum Phase Shifter in 28-nm CMOS for 5G communication

This paper presents a high gain vector-sum phase shifter for mmWave communication in a 28 nm CMOS process. The proposed phase shifter consists of an input matching network (IMN) with cascode structure, a coupler type I/Q generator, a variable gain amplifier (VGA), and an output matching network (OBN). The different loaded coupler is utilized in the I/Q generator to obtain a quadrature signal. To increase the gain of the phase shifter, the transistors and capacitors connected with the coupler are optimized. Moreover, the cascode topology is utilized in IMN to implement high isolation as well as enhancement of the gain. The Gilbert cell design is applied to control the I/Q signal in the VGA. The proposed phase shifter achieves a phase shift of 4-bits with high gain in the 32.5-36.5 GHz band. The maximum average gain is-1.65 dB at 34.5 GHz, and the root-mean-square (RMS) phase error of 2.24° and RMS gain error of 0.59 dB with power consumption is 27 mW from a 1.8-V supply. The proposed vector-sum phase shifter achieves a high gain with an I/Q generator in Ka-band.