A low-jitter phase-locked loop based on a charge pump using a current-bypass technique

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Abstract

A charge-pump circuit using a currentbypass technique, which suppresses charge sharing and reduces the sub-threshold currents, helps to decrease phase-locked loop (PLL) jitter without resorting to a feedback amplifier. The PLL shows no stability issues and no power-up problems, which may occur when a feedback amplifier is used. The PLL is implemented in 0.11-μm CMOS technology to achieve 0.856-ps RMS and 8.75-ps peak-to-peak jitter, which is almost independent of ambient temperature while consuming 4 mW from a 1.2-V supply.

Original languageEnglish
Pages (from-to)331-338
Number of pages8
JournalJournal of Semiconductor Technology and Science
Volume14
Issue number3
DOIs
StatePublished - Jun 2014

Keywords

  • Charge pump
  • Charge sharing
  • Jitter
  • Phase-locked Loop
  • Subthreshold current

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