A mixed-signal VLSI neuroprocessor for image restoration

An analog systolic architecture that employs multiple neuroprocessors for image restoration is presented. For a two-dimensional image, parallel processing is performed for different rows of pixel data and pipelined processing is performed on each row of pixel data. For the image restoration neuroprocessor, local data computation is executed by analog circuitry to achieve full parallelism and to minimize power dissipation. Interprocessor communication is carried out in the digital format to maintain strong signal strength across the chip boundary and to allow multichip operation for high-speed image processing.