A Practical Implementation of the Ternary Logic Using Memristors and MOSFETs

Jeonggyu Yang, Hyundong Lee, Jae Hoon Jeong, Tae Hak Kim, Sin Hyung Lee, Taigon Song

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

10 Scopus citations

Abstract

Due to the impotent forecasts of binary systems, ternary systems are regaining attention. Among many ternary devices, a passive device called memristor that is based on resistance switching is considered a good candidate when integrated with MOSFETs. Therefore, in this paper, we design ternary logic based on memristors and MOSFETs. We highlight the design issues that should be resolved (e.g., signal distortion and high static current) and present practical solutions. To the best of the authors' knowledge, we present 15 novel ternary logic cells and circuitry that include the design of the first balanced ternary full adder (TFA). By our TFA, we visualize that it is possible to design the most practical ternary circuits using memristors and MOSFETs. Our TFA uses 97 transistors and 87 memristors, which is the most reasonable TFA design that has the highest potential to be implemented in the near future.

Original languageEnglish
Title of host publicationProceedings - 2021 IEEE 51st International Symposium on Multiple-Valued Logic, ISMVL 2021
PublisherIEEE Computer Society
Pages183-188
Number of pages6
ISBN (Electronic)9781728192246
DOIs
StatePublished - May 2021
Event51st IEEE International Symposium on Multiple-Valued Logic, ISMVL 2021 - Virtual, Nur-sultan, Kazakhstan
Duration: 25 May 202127 May 2021

Publication series

NameProceedings of The International Symposium on Multiple-Valued Logic
Volume2021-May
ISSN (Print)0195-623X

Conference

Conference51st IEEE International Symposium on Multiple-Valued Logic, ISMVL 2021
Country/TerritoryKazakhstan
CityVirtual, Nur-sultan
Period25/05/2127/05/21

Keywords

  • memristor
  • ternary full-adder
  • ternary logic

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