TY - GEN
T1 - A quad 6Gb/s multi-rate CMOS transceiver with TX rise/fall-time control
AU - Moon, Yongsam
AU - Ahn, Gijung
AU - Choi, Hoon
AU - Kim, Namhoon
AU - Shim, Daeyun
PY - 2006
Y1 - 2006
N2 - A multi-rate transceiver incorporating TX slew control with >2x range, PLL with <0.5x loop-filter area using capacitance multiplication, and ΔΣ-SSCG having 11.7dB peak reduction is designed in 0.13μm CMOS. Occupying 2.33mm2 with TX operable up to 8.5Gb/s, the quad transceiver consumes 386mW from 1.2V supply and has a BER<10-14 at 6Gb/s over an 8m cable with 22dB loss.
AB - A multi-rate transceiver incorporating TX slew control with >2x range, PLL with <0.5x loop-filter area using capacitance multiplication, and ΔΣ-SSCG having 11.7dB peak reduction is designed in 0.13μm CMOS. Occupying 2.33mm2 with TX operable up to 8.5Gb/s, the quad transceiver consumes 386mW from 1.2V supply and has a BER<10-14 at 6Gb/s over an 8m cable with 22dB loss.
UR - http://www.scopus.com/inward/record.url?scp=39049151209&partnerID=8YFLogxK
M3 - Conference contribution
AN - SCOPUS:39049151209
SN - 1424400791
SN - 9781424400799
T3 - Digest of Technical Papers - IEEE International Solid-State Circuits Conference
SP - 84+79
BT - 2006 IEEE International Solid-State Circuits Conference, ISSCC - Digest of Technical Papers
T2 - 2006 IEEE International Solid-State Circuits Conference, ISSCC
Y2 - 6 February 2006 through 9 February 2006
ER -