A quad 6Gb/s multi-rate CMOS transceiver with TX rise/fall-time control

Yongsam Moon; Gijung Ahn; Hoon Choi; Namhoon Kim; Daeyun Shim

A quad 6Gb/s multi-rate CMOS transceiver with TX rise/fall-time control

Yongsam Moon, Gijung Ahn, Hoon Choi, Namhoon Kim, Daeyun Shim

School of Electrical and Computer Engineering

Silicon Image Inc.

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

17 Scopus citations

Abstract

A multi-rate transceiver incorporating TX slew control with >2x range, PLL with <0.5x loop-filter area using capacitance multiplication, and ΔΣ-SSCG having 11.7dB peak reduction is designed in 0.13μm CMOS. Occupying 2.33mm² with TX operable up to 8.5Gb/s, the quad transceiver consumes 386mW from 1.2V supply and has a BER<10^-14 at 6Gb/s over an 8m cable with 22dB loss.

Original language	English
Title of host publication	2006 IEEE International Solid-State Circuits Conference, ISSCC - Digest of Technical Papers
Pages	84+79
State	Published - 2006
Event	2006 IEEE International Solid-State Circuits Conference, ISSCC - San Francisco, CA, United States Duration: 6 Feb 2006 → 9 Feb 2006

Publication series

Name	Digest of Technical Papers - IEEE International Solid-State Circuits Conference
ISSN (Print)	0193-6530

Conference

Conference	2006 IEEE International Solid-State Circuits Conference, ISSCC
Country/Territory	United States
City	San Francisco, CA
Period	6/02/06 → 9/02/06

Cite this

@inproceedings{584f234a110b4abf8bd6c83a8534b8cb,

title = "A quad 6Gb/s multi-rate CMOS transceiver with TX rise/fall-time control",

abstract = "A multi-rate transceiver incorporating TX slew control with >2x range, PLL with <0.5x loop-filter area using capacitance multiplication, and ΔΣ-SSCG having 11.7dB peak reduction is designed in 0.13μm CMOS. Occupying 2.33mm2 with TX operable up to 8.5Gb/s, the quad transceiver consumes 386mW from 1.2V supply and has a BER<10-14 at 6Gb/s over an 8m cable with 22dB loss.",

author = "Yongsam Moon and Gijung Ahn and Hoon Choi and Namhoon Kim and Daeyun Shim",

year = "2006",

language = "English",

isbn = "1424400791",

series = "Digest of Technical Papers - IEEE International Solid-State Circuits Conference",

pages = "84+79",

booktitle = "2006 IEEE International Solid-State Circuits Conference, ISSCC - Digest of Technical Papers",

note = "2006 IEEE International Solid-State Circuits Conference, ISSCC ; Conference date: 06-02-2006 Through 09-02-2006",

}

Moon, Y, Ahn, G, Choi, H, Kim, N & Shim, D 2006, A quad 6Gb/s multi-rate CMOS transceiver with TX rise/fall-time control. in 2006 IEEE International Solid-State Circuits Conference, ISSCC - Digest of Technical Papers., 1696053, Digest of Technical Papers - IEEE International Solid-State Circuits Conference, pp. 84+79, 2006 IEEE International Solid-State Circuits Conference, ISSCC, San Francisco, CA, United States, 6/02/06.

A quad 6Gb/s multi-rate CMOS transceiver with TX rise/fall-time control. / Moon, Yongsam; Ahn, Gijung; Choi, Hoon et al.
2006 IEEE International Solid-State Circuits Conference, ISSCC - Digest of Technical Papers. 2006. p. 84+79 1696053 (Digest of Technical Papers - IEEE International Solid-State Circuits Conference).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

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AU - Kim, Namhoon

AU - Shim, Daeyun

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AB - A multi-rate transceiver incorporating TX slew control with >2x range, PLL with <0.5x loop-filter area using capacitance multiplication, and ΔΣ-SSCG having 11.7dB peak reduction is designed in 0.13μm CMOS. Occupying 2.33mm2 with TX operable up to 8.5Gb/s, the quad transceiver consumes 386mW from 1.2V supply and has a BER<10-14 at 6Gb/s over an 8m cable with 22dB loss.

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M3 - Conference contribution

AN - SCOPUS:39049151209

SN - 1424400791

SN - 9781424400799

T3 - Digest of Technical Papers - IEEE International Solid-State Circuits Conference

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BT - 2006 IEEE International Solid-State Circuits Conference, ISSCC - Digest of Technical Papers

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Y2 - 6 February 2006 through 9 February 2006

ER -

A quad 6Gb/s multi-rate CMOS transceiver with TX rise/fall-time control

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