TY - GEN
T1 - A VLSI implementation of minutiae extraction for secure fingerprint authentication
AU - Pan, Sung Bum
AU - Moon, Daesung
AU - Kim, Kichul
AU - Chung, Yongwha
PY - 2007
Y1 - 2007
N2 - To heighten the biometrics security level, the biometrics feature extraction and verification need to be performed within smart cards, not in external card readers. However, the smart card chip has very limited processing capability, and typical fingerprint feature extraction and verification algorithms may not be executed on a state-of-the-art smart card. Therefore, this paper presents an System-on-Chip(SoC) implementation of the fingerprint feature extraction algorithm which can be integrated into smart cards. To implement the ridge-following algorithm onto resource-constrained SoCs1 the algorithm has been modified to increase the efficiency of the hardware. Each functional block of the algorithm has been implemented in hardware or in software by considering its computational complexity, cost and utilization of the hardware, and efficiency of the entire system. The proposed system operated in 50MHz, and 20-50 minutiae could be extracted from typical 248×292 fingerprint images in real time with small area(97K gates), Our current implementation, developed as an IP for SoCs with ARM CPU and AMBA bus, can also be used in many other smart card configurations. Also, hardware for minutiae matching can be easily integrated into the proposed minutiae extraction hardware to execute the overall fingerprint authentication within the smart card chip, removing the possibility of leaking any biometric information.
AB - To heighten the biometrics security level, the biometrics feature extraction and verification need to be performed within smart cards, not in external card readers. However, the smart card chip has very limited processing capability, and typical fingerprint feature extraction and verification algorithms may not be executed on a state-of-the-art smart card. Therefore, this paper presents an System-on-Chip(SoC) implementation of the fingerprint feature extraction algorithm which can be integrated into smart cards. To implement the ridge-following algorithm onto resource-constrained SoCs1 the algorithm has been modified to increase the efficiency of the hardware. Each functional block of the algorithm has been implemented in hardware or in software by considering its computational complexity, cost and utilization of the hardware, and efficiency of the entire system. The proposed system operated in 50MHz, and 20-50 minutiae could be extracted from typical 248×292 fingerprint images in real time with small area(97K gates), Our current implementation, developed as an IP for SoCs with ARM CPU and AMBA bus, can also be used in many other smart card configurations. Also, hardware for minutiae matching can be easily integrated into the proposed minutiae extraction hardware to execute the overall fingerprint authentication within the smart card chip, removing the possibility of leaking any biometric information.
KW - Fingerprint authentication
KW - Minutiae extraction
KW - SoC
KW - VLSI
UR - http://www.scopus.com/inward/record.url?scp=38349007052&partnerID=8YFLogxK
U2 - 10.1007/978-3-540-74377-4_63
DO - 10.1007/978-3-540-74377-4_63
M3 - Conference contribution
AN - SCOPUS:38349007052
SN - 9783540743767
T3 - Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)
SP - 605
EP - 615
BT - Computational Intelligence and Security - International Conference, CIS 2006, Revised Selected Papers
PB - Springer Verlag
T2 - International Conference on Computational Intelligence and Security, CIS 2006
Y2 - 3 November 2006 through 6 November 2006
ER -