TY - GEN
T1 - A wide-band active-RC filter with a fast tuning scheme for wireless communication receivers
AU - Jinup, Lim
AU - Youngjoo, Cho
AU - Kyungsoo, Jung
AU - Jongmin, Park
AU - Joongho, Choi
AU - Jaewhui, Kim
PY - 2005
Y1 - 2005
N2 - The paper presents the design of a wide-band active-RC filter with a fast tuning circuit for wireless communication receiver applications. The filter topology is the 5th-order Chebyshev-II lowpass filter type and the programmable bandwidth can be extended up to 10MHz while the stopband attenuation larger than 40dB is obtained. The Successive Approximation Register (SAR) scheme is incorporated for a prompt on-chip tuning operation that should be needed for compensating RC variations. The filter is fabricated in a 0.18-μm standard digital CMOS technology and dissipates 20.7mW for a supply voltage of 1.8V. The measured 3rd-order harmonic input intercept point (IIP3) is larger than 32dBm.
AB - The paper presents the design of a wide-band active-RC filter with a fast tuning circuit for wireless communication receiver applications. The filter topology is the 5th-order Chebyshev-II lowpass filter type and the programmable bandwidth can be extended up to 10MHz while the stopband attenuation larger than 40dB is obtained. The Successive Approximation Register (SAR) scheme is incorporated for a prompt on-chip tuning operation that should be needed for compensating RC variations. The filter is fabricated in a 0.18-μm standard digital CMOS technology and dissipates 20.7mW for a supply voltage of 1.8V. The measured 3rd-order harmonic input intercept point (IIP3) is larger than 32dBm.
UR - http://www.scopus.com/inward/record.url?scp=33847144136&partnerID=8YFLogxK
U2 - 10.1109/CICC.2005.1568750
DO - 10.1109/CICC.2005.1568750
M3 - Conference contribution
AN - SCOPUS:33847144136
SN - 0780390237
SN - 9780780390232
T3 - Proceedings of the Custom Integrated Circuits Conference
SP - 632
EP - 635
BT - Proceedings of the IEEE 2005 Custom Integrated Circuits Conference
T2 - IEEE 2005 Custom Integrated Circuits Conference
Y2 - 18 September 2005 through 21 September 2005
ER -