Analysis and comparison of interface trap for single and 3D stacked nanowire FET

Kyul Ko; Dokyun Son; Myounggon Kang; Hyungcheol Shin

doi:10.1166/jnn.2017.14717

Analysis and comparison of interface trap for single and 3D stacked nanowire FET

Kyul Ko, Dokyun Son, Myounggon Kang, Hyungcheol Shin

School of Advanced Fusion Studies

Seoul National University

Research output: Contribution to journal › Article › peer-review

1 Scopus citations

Abstract

In this work, we investigate the interface trap (IFT) variation effect, one of the most important reliability issues, in 5-nm node gate-all-around (GAA) single and 3D stacked nanowire field-effect transistors (NWFETs). Comparing the IFT variation effect, the 3D stacked NWFET was found to have stronger immunity compared to a single NWFET. However, the 3D stacked NWFET is significantly affected by the variation of each stack due to the process variation effect (PVE). For this reason, the goals of this paper were to reach a comprehensive understanding of the IFT variation effect and to provide an accurate guideline pertaining to the NW diameters in single NWFETs and 3D stacked NWFETs.

Original language	English
Pages (from-to)	7121-7125
Number of pages	5
Journal	Journal of Nanoscience and Nanotechnology
Volume	17
Issue number	10
DOIs	https://doi.org/10.1166/jnn.2017.14717
State	Published - Oct 2017

Keywords

3D Stacked Nanowire FET
Interface Trap Charge
Process Variation Effect (PVE)
Single Nanowire FET
Threshold Voltage Variation

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10.1166/jnn.2017.14717

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title = "Analysis and comparison of interface trap for single and 3D stacked nanowire FET",

abstract = "In this work, we investigate the interface trap (IFT) variation effect, one of the most important reliability issues, in 5-nm node gate-all-around (GAA) single and 3D stacked nanowire field-effect transistors (NWFETs). Comparing the IFT variation effect, the 3D stacked NWFET was found to have stronger immunity compared to a single NWFET. However, the 3D stacked NWFET is significantly affected by the variation of each stack due to the process variation effect (PVE). For this reason, the goals of this paper were to reach a comprehensive understanding of the IFT variation effect and to provide an accurate guideline pertaining to the NW diameters in single NWFETs and 3D stacked NWFETs.",

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AU - Son, Dokyun

AU - Kang, Myounggon

AU - Shin, Hyungcheol

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AB - In this work, we investigate the interface trap (IFT) variation effect, one of the most important reliability issues, in 5-nm node gate-all-around (GAA) single and 3D stacked nanowire field-effect transistors (NWFETs). Comparing the IFT variation effect, the 3D stacked NWFET was found to have stronger immunity compared to a single NWFET. However, the 3D stacked NWFET is significantly affected by the variation of each stack due to the process variation effect (PVE). For this reason, the goals of this paper were to reach a comprehensive understanding of the IFT variation effect and to provide an accurate guideline pertaining to the NW diameters in single NWFETs and 3D stacked NWFETs.

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Analysis and comparison of interface trap for single and 3D stacked nanowire FET

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