Analysis and comparison of intrinsic characteristics for single and multi-channel nanoplate vertical FET devices

Kyul Ko, Changbeom Woo, Minsoo Kim, Youngsoo Seo, Shinkeun Kim, Myounggon Kang, Hyungcheol Shin

Research output: Contribution to journalArticlepeer-review

Abstract

In this paper, intrinsic characteristics of gate-all-around (GAA) nanoplate (NP) vertical FET (VFET) were investigated for single and multi-channel structure through 3-D technology computer-aided design (TCAD) simulations. The vertical device has strong immunity for the unprecedented short channel effects (SCE) and intrinsic gate delay compared with the lateral device owing to the flexible expansion channel in vertical direction. The proposed single and multi-channel NP VFETs (NP height = 40 nm) exhibit excellent characteristics with Ion/Ioff > 105, subthreshold swing (SS) < 73 mV/decade, and drain-induced barrier lowering (DIBL) < 60 mV/V.

Original languageEnglish
Pages (from-to)691-696
Number of pages6
JournalJournal of Semiconductor Technology and Science
Volume17
Issue number5
DOIs
StatePublished - Oct 2017

Keywords

  • Gate-all-around (GAA)
  • Multi-channel device
  • Nanoplate (NP)
  • RC delay
  • Short channel effect (SCE)
  • Vertical FET (VFET)

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