Analysis of Bias Temperature Instability in Peripheral CMOS Devices for Low-Temperature Memory Applications

Jung Rae Cho; Seungwon Go; Jingyu Park; Tae Jun Yang; Seonhaeng Lee; Namhyun Lee; Dong Keun Lee; Yoon Kim; Myounggon Kang; Rock Hyun Baek; Changhyun Kim; Sangwan Kim; Dae Hwan Kim

doi:10.1109/ACCESS.2025.3605829

Analysis of Bias Temperature Instability in Peripheral CMOS Devices for Low-Temperature Memory Applications

Jung Rae Cho
, Seungwon Go
, Jingyu Park
, Tae Jun Yang
, Seonhaeng Lee
, Namhyun Lee
, Dong Keun Lee
, Yoon Kim
, Myounggon Kang
, Rock Hyun Baek
, Changhyun Kim
, Sangwan Kim
, Dae Hwan Kim

Research output: Contribution to journal › Article › peer-review

Abstract

In this study, the bias temperature instability (BTI) of peripheral complementary metal–oxide semiconductor devices in a cell-on-peri (COP) structure is investigated under cryogenic conditions. First, positive BTI (PBTI) in the nMOSFET is found to be more severe than negative BTI (NBTI) in the pMOSFET, despite the same overdrive voltage. This behavior is primarily attributed to the shorter carrier capture/emission time of the nMOSFET. Second, the threshold voltage shift ( ΔV_th in the pMOSFET caused by NBTI increases as the temperature decreases from 300K to 77K. This trend differs from that of the nMOSFET and is reported here for the first time. It is attributed to increased Fowler–Nordheim (FN) tunneling and impact ionization, resulting from suppressed phonon scattering at low temperatures. Last of all, the nMOSFET exhibits hump characteristics due to PBTI.

Original language	English
Pages (from-to)	156497-156503
Number of pages	7
Journal	IEEE Access
Volume	13
DOIs	https://doi.org/10.1109/ACCESS.2025.3605829
State	Published - 2025

Keywords

Bias temperature instability (BTI)
cell-on-peri (COP)
cryogenic condition
hump characteristic

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10.1109/ACCESS.2025.3605829

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@article{3fa87b86e7954877a689b99df87cf17c,

title = "Analysis of Bias Temperature Instability in Peripheral CMOS Devices for Low-Temperature Memory Applications",

abstract = "In this study, the bias temperature instability (BTI) of peripheral complementary metal–oxide semiconductor devices in a cell-on-peri (COP) structure is investigated under cryogenic conditions. First, positive BTI (PBTI) in the nMOSFET is found to be more severe than negative BTI (NBTI) in the pMOSFET, despite the same overdrive voltage. This behavior is primarily attributed to the shorter carrier capture/emission time of the nMOSFET. Second, the threshold voltage shift ( ΔVth in the pMOSFET caused by NBTI increases as the temperature decreases from 300K to 77K. This trend differs from that of the nMOSFET and is reported here for the first time. It is attributed to increased Fowler–Nordheim (FN) tunneling and impact ionization, resulting from suppressed phonon scattering at low temperatures. Last of all, the nMOSFET exhibits hump characteristics due to PBTI.",

keywords = "Bias temperature instability (BTI), cell-on-peri (COP), cryogenic condition, hump characteristic",

author = "\{Rae Cho\}, Jung and Seungwon Go and Jingyu Park and \{Jun Yang\}, Tae and Seonhaeng Lee and Namhyun Lee and \{Keun Lee\}, Dong and Yoon Kim and Myounggon Kang and Baek, \{Rock Hyun\} and Changhyun Kim and Sangwan Kim and \{Hwan Kim\}, Dae",

note = "Publisher Copyright: {\textcopyright} 2013 IEEE.",

year = "2025",

doi = "10.1109/ACCESS.2025.3605829",

language = "English",

volume = "13",

pages = "156497--156503",

journal = "IEEE Access",

issn = "2169-3536",

publisher = "Institute of Electrical and Electronics Engineers Inc.",

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TY - JOUR

T1 - Analysis of Bias Temperature Instability in Peripheral CMOS Devices for Low-Temperature Memory Applications

AU - Rae Cho, Jung

AU - Go, Seungwon

AU - Park, Jingyu

AU - Jun Yang, Tae

AU - Lee, Seonhaeng

AU - Lee, Namhyun

AU - Keun Lee, Dong

AU - Kim, Yoon

AU - Kang, Myounggon

AU - Baek, Rock Hyun

AU - Kim, Changhyun

AU - Kim, Sangwan

AU - Hwan Kim, Dae

PY - 2025

Y1 - 2025

N2 - In this study, the bias temperature instability (BTI) of peripheral complementary metal–oxide semiconductor devices in a cell-on-peri (COP) structure is investigated under cryogenic conditions. First, positive BTI (PBTI) in the nMOSFET is found to be more severe than negative BTI (NBTI) in the pMOSFET, despite the same overdrive voltage. This behavior is primarily attributed to the shorter carrier capture/emission time of the nMOSFET. Second, the threshold voltage shift ( ΔVth in the pMOSFET caused by NBTI increases as the temperature decreases from 300K to 77K. This trend differs from that of the nMOSFET and is reported here for the first time. It is attributed to increased Fowler–Nordheim (FN) tunneling and impact ionization, resulting from suppressed phonon scattering at low temperatures. Last of all, the nMOSFET exhibits hump characteristics due to PBTI.

AB - In this study, the bias temperature instability (BTI) of peripheral complementary metal–oxide semiconductor devices in a cell-on-peri (COP) structure is investigated under cryogenic conditions. First, positive BTI (PBTI) in the nMOSFET is found to be more severe than negative BTI (NBTI) in the pMOSFET, despite the same overdrive voltage. This behavior is primarily attributed to the shorter carrier capture/emission time of the nMOSFET. Second, the threshold voltage shift ( ΔVth in the pMOSFET caused by NBTI increases as the temperature decreases from 300K to 77K. This trend differs from that of the nMOSFET and is reported here for the first time. It is attributed to increased Fowler–Nordheim (FN) tunneling and impact ionization, resulting from suppressed phonon scattering at low temperatures. Last of all, the nMOSFET exhibits hump characteristics due to PBTI.

KW - Bias temperature instability (BTI)

KW - cell-on-peri (COP)

KW - cryogenic condition

KW - hump characteristic

UR - https://www.scopus.com/pages/publications/105015069258

U2 - 10.1109/ACCESS.2025.3605829

DO - 10.1109/ACCESS.2025.3605829

M3 - Article

AN - SCOPUS:105015069258

SN - 2169-3536

VL - 13

SP - 156497

EP - 156503

JO - IEEE Access

JF - IEEE Access

ER -

Analysis of Bias Temperature Instability in Peripheral CMOS Devices for Low-Temperature Memory Applications

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Keywords

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