TY - JOUR
T1 - Analysis of Electrothermal Characteristics of GAA Vertical Nanoplate-Shaped FETs
AU - Son, Dokyun
AU - Myeong, Ilho
AU - Kim, Hyunsuk
AU - Kang, Myounggon
AU - Jeon, Jongwook
AU - Shin, Hyungcheol
N1 - Publisher Copyright:
© 1963-2012 IEEE.
PY - 2018/7
Y1 - 2018/7
N2 - In this paper, the thermal and electrical characteristics of a gate-all-around (GAA) vertical nanoplate-shaped field-effect transistor (vNPFET) are studied for sub-5-nm technologies using well-calibrated technology computer-aided design simulations. An asymmetric structure of a vertical device has different characteristics that depend on the source/drain position. When the source and the drain are placed at the top and the bottom electrodes, respectively, the GAA-vNPFET drive current increases, but the self-heating effect becomes worse. To co-optimize the performance and the reliability, the gate delay (τdelay) and the thermal resistance (Rth) were evaluated simultaneously in terms of various geometric factors for the first time, showing that a reckless scaling of the channel thickness below 5 nm significantly degrades the electrothermal characteristics.
AB - In this paper, the thermal and electrical characteristics of a gate-all-around (GAA) vertical nanoplate-shaped field-effect transistor (vNPFET) are studied for sub-5-nm technologies using well-calibrated technology computer-aided design simulations. An asymmetric structure of a vertical device has different characteristics that depend on the source/drain position. When the source and the drain are placed at the top and the bottom electrodes, respectively, the GAA-vNPFET drive current increases, but the self-heating effect becomes worse. To co-optimize the performance and the reliability, the gate delay (τdelay) and the thermal resistance (Rth) were evaluated simultaneously in terms of various geometric factors for the first time, showing that a reckless scaling of the channel thickness below 5 nm significantly degrades the electrothermal characteristics.
KW - Gate all around (GAA)
KW - gate delay (t delay)
KW - nanoplate
KW - self-heating effect (SHE)
KW - technology computeraided design (TCAD)
KW - vertical device
UR - http://www.scopus.com/inward/record.url?scp=85048001095&partnerID=8YFLogxK
U2 - 10.1109/TED.2018.2832239
DO - 10.1109/TED.2018.2832239
M3 - Article
AN - SCOPUS:85048001095
SN - 0018-9383
VL - 65
SP - 3061
EP - 3064
JO - IEEE Transactions on Electron Devices
JF - IEEE Transactions on Electron Devices
IS - 7
ER -