@inproceedings{6e0ae1548aad4a5995d68b0c22e5797b,
title = "Analysis of parasitic capacitance and performance in gate-ail-around and tri-gate channel vertical FET",
abstract = "The parasitic capacitances in Vertical FET(VFET) are investigated. Vertical device has additional parasitic capacitance compared with lateral device because of deeply contacted drain metal. This parasitic capacitance degrades the performance of the device. In this study, tri-gate channel VFET which eliminates the additional parasitic capacitance without broadening the device area is proposed.",
author = "Youngsoo Seo and Myounggon Kang and Hyungcheol Shin",
note = "Publisher Copyright: {\textcopyright} 2017 JSAP.; 22nd Silicon Nanoelectronics Workshop, SNW 2017 ; Conference date: 04-06-2017 Through 05-06-2017",
year = "2017",
month = dec,
day = "29",
doi = "10.23919/SNW.2017.8242298",
language = "English",
series = "2017 Silicon Nanoelectronics Workshop, SNW 2017",
publisher = "Institute of Electrical and Electronics Engineers Inc.",
pages = "63--64",
booktitle = "2017 Silicon Nanoelectronics Workshop, SNW 2017",
address = "United States",
}