TY - GEN
T1 - Analysis of RC delay for high performance in LFET and VFET
AU - Woo, Changbeom
AU - Kim, Jongsu
AU - Kang, Myounggon
AU - Shin, Hyungcheol
N1 - Publisher Copyright:
© 2017 JSAP.
PY - 2017/12/29
Y1 - 2017/12/29
N2 - In this paper, we have investigated RC delay not only on single channel but also on multi-channels in lateral FET (LFET) and vertical FET (VFET). It has verified that there is always constant for SCEs regardless of the number of channels. Since all structures have the same gate length and spacer length, they have the same gate controllability. On the other hand, RC delay depends on the structure. Because VFET has more parasitic capacitance, it shows poor RC delay. As a result, LFET is more promising than VFET in high performance.
AB - In this paper, we have investigated RC delay not only on single channel but also on multi-channels in lateral FET (LFET) and vertical FET (VFET). It has verified that there is always constant for SCEs regardless of the number of channels. Since all structures have the same gate length and spacer length, they have the same gate controllability. On the other hand, RC delay depends on the structure. Because VFET has more parasitic capacitance, it shows poor RC delay. As a result, LFET is more promising than VFET in high performance.
UR - http://www.scopus.com/inward/record.url?scp=85051012388&partnerID=8YFLogxK
U2 - 10.23919/SNW.2017.8242301
DO - 10.23919/SNW.2017.8242301
M3 - Conference contribution
AN - SCOPUS:85051012388
T3 - 2017 Silicon Nanoelectronics Workshop, SNW 2017
SP - 69
EP - 70
BT - 2017 Silicon Nanoelectronics Workshop, SNW 2017
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 22nd Silicon Nanoelectronics Workshop, SNW 2017
Y2 - 4 June 2017 through 5 June 2017
ER -