Analysis of Self-Heating Effects on vertical FET according to Shallow Trench Isolation

Ilho Myeong; Dokyun Son; Hyunsuk Kim; Myounggon Kang; Hyungcheol Shin

doi:10.1016/j.sse.2017.07.013

Analysis of Self-Heating Effects on vertical FET according to Shallow Trench Isolation

Ilho Myeong, Dokyun Son, Hyunsuk Kim, Myounggon Kang, Hyungcheol Shin

School of Advanced Fusion Studies

Seoul National University

Research output: Contribution to journal › Article › peer-review

4 Scopus citations

Abstract

In this paper, Self-Heating Effect (SHE) according to depth of STI was analyzed and STI thickness optimization was performed in the plate-shaped vertical field effect transistor (VFET). In case of a VFET, the path of leakage current (I_off) is different from that of a lateral FET (LFET). As a result, I_off of VFET is not influenced by STI depth. For this reason, the STI depth of the VFET is not needed as much as the depth needed to reduce I_off in the LFET. As a result, if the STI depth of the VFET is reduced from 100 nm to 20 nm, which is the drain region depth doped with Arsenic, thermal resistance (R_th) is expected to be reduced by 32.19% and on current (I_on) is expected to be increased by 1.54% without affecting the I_off as compared with STI depth of 100 nm in VFET.

Original language	English
Pages (from-to)	123-127
Number of pages	5
Journal	Solid-State Electronics
Volume	137
DOIs	https://doi.org/10.1016/j.sse.2017.07.013
State	Published - Nov 2017

Keywords

Heat flux
Plate-shaped vertical field effect transistor (VFET)
Self Heating Effect (SHE)
Thermal resistance (R)
ΔT

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10.1016/j.sse.2017.07.013

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@article{0e0aa806e78248dba592012177d3463e,

title = "Analysis of Self-Heating Effects on vertical FET according to Shallow Trench Isolation",

abstract = "In this paper, Self-Heating Effect (SHE) according to depth of STI was analyzed and STI thickness optimization was performed in the plate-shaped vertical field effect transistor (VFET). In case of a VFET, the path of leakage current (Ioff) is different from that of a lateral FET (LFET). As a result, Ioff of VFET is not influenced by STI depth. For this reason, the STI depth of the VFET is not needed as much as the depth needed to reduce Ioff in the LFET. As a result, if the STI depth of the VFET is reduced from 100 nm to 20 nm, which is the drain region depth doped with Arsenic, thermal resistance (Rth) is expected to be reduced by 32.19% and on current (Ion) is expected to be increased by 1.54% without affecting the Ioff as compared with STI depth of 100 nm in VFET.",

keywords = "Heat flux, Plate-shaped vertical field effect transistor (VFET), Self Heating Effect (SHE), Thermal resistance (R), ΔT",

author = "Ilho Myeong and Dokyun Son and Hyunsuk Kim and Myounggon Kang and Hyungcheol Shin",

note = "Publisher Copyright: {\textcopyright} 2017",

year = "2017",

month = nov,

doi = "10.1016/j.sse.2017.07.013",

language = "English",

volume = "137",

pages = "123--127",

journal = "Solid-State Electronics",

issn = "0038-1101",

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T1 - Analysis of Self-Heating Effects on vertical FET according to Shallow Trench Isolation

AU - Myeong, Ilho

AU - Son, Dokyun

AU - Kim, Hyunsuk

AU - Kang, Myounggon

AU - Shin, Hyungcheol

PY - 2017/11

Y1 - 2017/11

N2 - In this paper, Self-Heating Effect (SHE) according to depth of STI was analyzed and STI thickness optimization was performed in the plate-shaped vertical field effect transistor (VFET). In case of a VFET, the path of leakage current (Ioff) is different from that of a lateral FET (LFET). As a result, Ioff of VFET is not influenced by STI depth. For this reason, the STI depth of the VFET is not needed as much as the depth needed to reduce Ioff in the LFET. As a result, if the STI depth of the VFET is reduced from 100 nm to 20 nm, which is the drain region depth doped with Arsenic, thermal resistance (Rth) is expected to be reduced by 32.19% and on current (Ion) is expected to be increased by 1.54% without affecting the Ioff as compared with STI depth of 100 nm in VFET.

AB - In this paper, Self-Heating Effect (SHE) according to depth of STI was analyzed and STI thickness optimization was performed in the plate-shaped vertical field effect transistor (VFET). In case of a VFET, the path of leakage current (Ioff) is different from that of a lateral FET (LFET). As a result, Ioff of VFET is not influenced by STI depth. For this reason, the STI depth of the VFET is not needed as much as the depth needed to reduce Ioff in the LFET. As a result, if the STI depth of the VFET is reduced from 100 nm to 20 nm, which is the drain region depth doped with Arsenic, thermal resistance (Rth) is expected to be reduced by 32.19% and on current (Ion) is expected to be increased by 1.54% without affecting the Ioff as compared with STI depth of 100 nm in VFET.

KW - Heat flux

KW - Plate-shaped vertical field effect transistor (VFET)

KW - Self Heating Effect (SHE)

KW - Thermal resistance (R)

KW - ΔT

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U2 - 10.1016/j.sse.2017.07.013

DO - 10.1016/j.sse.2017.07.013

M3 - Article

AN - SCOPUS:85029524688

SN - 0038-1101

VL - 137

SP - 123

EP - 127

JO - Solid-State Electronics

JF - Solid-State Electronics

ER -

Analysis of Self-Heating Effects on vertical FET according to Shallow Trench Isolation

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Keywords

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