BLT/STA/Si structure for MFIS in an NDRO-type ferroelectric random access memory

Ferroelectric (Bi,La)₄Ti₃O₁₂ (BLT) thin films were prepared on a p-type Si (100) wafer with a SrTa₂ O ₆ (STA) buffer layer for a metal-ferroelectric-insulator-silicon (MFIS) structure. The STA buffer layer was completely crystallized at the high temperature over 800°C. We observed that STA thin films fabricated at 900°C for 3 minutes in O₂ ambient had good insulating properties. Their EOT value was about 5.7 nm. Considering the distribution of the bias voltage on a series capacitor, the ferroelectric BLT and the dielectric STA, BLT thin films with a different thickness were formed on STA/Si structures and characterized by C-V measurement including memory windows. It was found that the memory window width was about 1.5 V for the ± 5 V bias sweeping with the 600 nm thick BLT films on STA/Si structure. The leakage current density was about 1.0 × 10^-7 A/cm² at 5 V. These results are useful and promise the realization of a MFIS structure with the BLT and a STA layer for non-destructive read-out (NDRO) type ferroelectric memories.