Characteristics of bottom-gate low temperature nanocrystalline silicon thin film transistor fabricated by hydrogen annealing of gate dielectric layer

Thin film transistors having nanocrystalline silicon as an active layer were fabricated by catalytic-CVD at a low process temperature (≤ 200 °C). The tri-layer of the bottom-gate TFT was deposited continuously inside the Cat-CVD reactor. In order to improve the quality of the gate dielectric layer an in-situ hydrogen annealing step was introduced in between the silicon nitride and the nanocrystalline silicon deposition steps. The in-situ hydrogen annealing was effective in reducing the hysteresis in the C-V characteristics and in enhancing the breakdown voltage by decreasing the defects inside the SiN _x film.