Characterization of 2-bit recessed channel memory with lifted-charge trapping node (L-CTN) scheme

Jang Gn Yun; Il Han Park; Seongjae Dot; Jung Ioon Lee; Doo Hyun Kim; Gil Sung Lee; Yoon Kim; Jong Duk Lee; Byung Gook Park

doi:10.1093/ietele/e91-c.5.742

Characterization of 2-bit recessed channel memory with lifted-charge trapping node (L-CTN) scheme

Jang Gn Yun, Il Han Park, Seongjae Dot, Jung Ioon Lee, Doo Hyun Kim, Gil Sung Lee, Yoon Kim, Jong Duk Lee, Byung Gook Park

School of Electrical and Computer Engineering

Seoul National University

Research output: Contribution to journal › Article › peer-review

2 Scopus citations

Abstract

In this paper, characteristics of the 2-bit recessed channel memory with lifted-charge trapping nodes are investigated. The length between the charge trapping nodes through channel, which is defined as the effective memory node length (M_eff), is extended by lifting op them. The dependence of VTH window and short channel effect (SCE) on the recessed depth is analyzed. Improvement of short channel effect is achieved hecanse the recessed channel stnscture increases the effective channel length (L_eff). Moreover, this device shows highly scalable memory characteristics without suffering from the bottom-side effect (BSE).

Original language	English
Pages (from-to)	742-746
Number of pages	5
Journal	IEICE Transactions on Electronics
Volume	E91-C
Issue number	5
DOIs	https://doi.org/10.1093/ietele/e91-c.5.742
State	Published - May 2008

Keywords

2-bit recessed chonnel tneosory
Bottom-side effect (BSE)
Lifted-chorge tropping node (LCTN) scheme
Second bit effect (SBE)
Short choonel effect (SCE)
VTH window

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10.1093/ietele/e91-c.5.742

Cite this

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title = "Characterization of 2-bit recessed channel memory with lifted-charge trapping node (L-CTN) scheme",

abstract = "In this paper, characteristics of the 2-bit recessed channel memory with lifted-charge trapping nodes are investigated. The length between the charge trapping nodes through channel, which is defined as the effective memory node length (Meff), is extended by lifting op them. The dependence of VTH window and short channel effect (SCE) on the recessed depth is analyzed. Improvement of short channel effect is achieved hecanse the recessed channel stnscture increases the effective channel length (Leff). Moreover, this device shows highly scalable memory characteristics without suffering from the bottom-side effect (BSE).",

keywords = "2-bit recessed chonnel tneosory, Bottom-side effect (BSE), Lifted-chorge tropping node (LCTN) scheme, Second bit effect (SBE), Short choonel effect (SCE), VTH window",

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AU - Yun, Jang Gn

AU - Park, Il Han

AU - Dot, Seongjae

AU - Lee, Jung Ioon

AU - Kim, Doo Hyun

AU - Lee, Gil Sung

AU - Kim, Yoon

AU - Lee, Jong Duk

AU - Park, Byung Gook

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N2 - In this paper, characteristics of the 2-bit recessed channel memory with lifted-charge trapping nodes are investigated. The length between the charge trapping nodes through channel, which is defined as the effective memory node length (Meff), is extended by lifting op them. The dependence of VTH window and short channel effect (SCE) on the recessed depth is analyzed. Improvement of short channel effect is achieved hecanse the recessed channel stnscture increases the effective channel length (Leff). Moreover, this device shows highly scalable memory characteristics without suffering from the bottom-side effect (BSE).

AB - In this paper, characteristics of the 2-bit recessed channel memory with lifted-charge trapping nodes are investigated. The length between the charge trapping nodes through channel, which is defined as the effective memory node length (Meff), is extended by lifting op them. The dependence of VTH window and short channel effect (SCE) on the recessed depth is analyzed. Improvement of short channel effect is achieved hecanse the recessed channel stnscture increases the effective channel length (Leff). Moreover, this device shows highly scalable memory characteristics without suffering from the bottom-side effect (BSE).

KW - 2-bit recessed chonnel tneosory

KW - Bottom-side effect (BSE)

KW - Lifted-chorge tropping node (LCTN) scheme

KW - Second bit effect (SBE)

KW - Short choonel effect (SCE)

KW - VTH window

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Characterization of 2-bit recessed channel memory with lifted-charge trapping node (L-CTN) scheme

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Keywords

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