Comparison of dual-k spacer and single-k spacer for single NWFET and 3-stack NWFET

Hyungwoo Ko; Jongsu Kim; Minsoo Kim; Myounggon Kang; Hyungcheol Shin

doi:10.1016/j.sse.2017.10.018

Comparison of dual-k spacer and single-k spacer for single NWFET and 3-stack NWFET

Hyungwoo Ko, Jongsu Kim, Minsoo Kim, Myounggon Kang, Hyungcheol Shin

School of Advanced Fusion Studies

Seoul National University

Research output: Contribution to journal › Article › peer-review

11 Scopus citations

Abstract

The investigation of the Dual-k spacer through comparative analysis of single nanowire-FET(NWFET)/3-stack NWFET and underlap/overlap channel is conducted. It is known that the dug 3-stack NWFET has better delay characteristics than single NWFET with the use of high permittivity material of C_in in Dual-k spacer structure. In addition, there is no difference of delay between overlap and underlap channel when it used Dual-k spacer structure but underlap channel of Dual-k 3-stack NWFET shows better short channel immunity.

Original language	English
Pages (from-to)	64-68
Number of pages	5
Journal	Solid-State Electronics
Volume	140
DOIs	https://doi.org/10.1016/j.sse.2017.10.018
State	Published - Feb 2018

Keywords

Dual-k spacer
High-to-low propagation delay
Intrinsic gate delay
Nanowire-FET
Underlap channel

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10.1016/j.sse.2017.10.018

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title = "Comparison of dual-k spacer and single-k spacer for single NWFET and 3-stack NWFET",

abstract = "The investigation of the Dual-k spacer through comparative analysis of single nanowire-FET(NWFET)/3-stack NWFET and underlap/overlap channel is conducted. It is known that the dug 3-stack NWFET has better delay characteristics than single NWFET with the use of high permittivity material of Cin in Dual-k spacer structure. In addition, there is no difference of delay between overlap and underlap channel when it used Dual-k spacer structure but underlap channel of Dual-k 3-stack NWFET shows better short channel immunity.",

keywords = "Dual-k spacer, High-to-low propagation delay, Intrinsic gate delay, Nanowire-FET, Underlap channel",

author = "Hyungwoo Ko and Jongsu Kim and Minsoo Kim and Myounggon Kang and Hyungcheol Shin",

note = "Publisher Copyright: {\textcopyright} 2017 Elsevier Ltd",

year = "2018",

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doi = "10.1016/j.sse.2017.10.018",

language = "English",

volume = "140",

pages = "64--68",

journal = "Solid-State Electronics",

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T1 - Comparison of dual-k spacer and single-k spacer for single NWFET and 3-stack NWFET

AU - Ko, Hyungwoo

AU - Kim, Jongsu

AU - Kim, Minsoo

AU - Kang, Myounggon

AU - Shin, Hyungcheol

PY - 2018/2

Y1 - 2018/2

N2 - The investigation of the Dual-k spacer through comparative analysis of single nanowire-FET(NWFET)/3-stack NWFET and underlap/overlap channel is conducted. It is known that the dug 3-stack NWFET has better delay characteristics than single NWFET with the use of high permittivity material of Cin in Dual-k spacer structure. In addition, there is no difference of delay between overlap and underlap channel when it used Dual-k spacer structure but underlap channel of Dual-k 3-stack NWFET shows better short channel immunity.

AB - The investigation of the Dual-k spacer through comparative analysis of single nanowire-FET(NWFET)/3-stack NWFET and underlap/overlap channel is conducted. It is known that the dug 3-stack NWFET has better delay characteristics than single NWFET with the use of high permittivity material of Cin in Dual-k spacer structure. In addition, there is no difference of delay between overlap and underlap channel when it used Dual-k spacer structure but underlap channel of Dual-k 3-stack NWFET shows better short channel immunity.

KW - Dual-k spacer

KW - High-to-low propagation delay

KW - Intrinsic gate delay

KW - Nanowire-FET

KW - Underlap channel

UR - https://www.scopus.com/pages/publications/85035033239

U2 - 10.1016/j.sse.2017.10.018

DO - 10.1016/j.sse.2017.10.018

M3 - Article

AN - SCOPUS:85035033239

SN - 0038-1101

VL - 140

SP - 64

EP - 68

JO - Solid-State Electronics

JF - Solid-State Electronics

ER -

Comparison of dual-k spacer and single-k spacer for single NWFET and 3-stack NWFET

Abstract

Keywords

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