TY - GEN
T1 - Comparison of parasitic components between LFET and VFET using 3D TCAD
AU - Kim, Minsoo
AU - Ko, Hyungwoo
AU - Kang, Myounggon
AU - Shin, Hyungcheol
N1 - Publisher Copyright:
© 2017 JSAP.
PY - 2017/12/29
Y1 - 2017/12/29
N2 - In this work, we compare parasitic components between lateral nanowire-FET (LFET) and vertical nanowire-FET (VFET) based on ITRS 2015 using 3D Technology Computer-aided Design (TCAD). We compare the parasitic resistances and capacitances in accordance with channel thickness. Further, we analyzed the effects of parasitic components on device performance and proposed the direction of device scaling.
AB - In this work, we compare parasitic components between lateral nanowire-FET (LFET) and vertical nanowire-FET (VFET) based on ITRS 2015 using 3D Technology Computer-aided Design (TCAD). We compare the parasitic resistances and capacitances in accordance with channel thickness. Further, we analyzed the effects of parasitic components on device performance and proposed the direction of device scaling.
UR - http://www.scopus.com/inward/record.url?scp=85051041440&partnerID=8YFLogxK
U2 - 10.23919/SNW.2017.8242312
DO - 10.23919/SNW.2017.8242312
M3 - Conference contribution
AN - SCOPUS:85051041440
T3 - 2017 Silicon Nanoelectronics Workshop, SNW 2017
SP - 91
EP - 92
BT - 2017 Silicon Nanoelectronics Workshop, SNW 2017
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 22nd Silicon Nanoelectronics Workshop, SNW 2017
Y2 - 4 June 2017 through 5 June 2017
ER -