@inproceedings{bf71de34f7704827a44ca74f88dad12a,
title = "Comparison of parasitic components between LFET and VFET using 3D TCAD",
abstract = "In this work, we compare parasitic components between lateral nanowire-FET (LFET) and vertical nanowire-FET (VFET) based on ITRS 2015 using 3D Technology Computer-aided Design (TCAD). We compare the parasitic resistances and capacitances in accordance with channel thickness. Further, we analyzed the effects of parasitic components on device performance and proposed the direction of device scaling.",
author = "Minsoo Kim and Hyungwoo Ko and Myounggon Kang and Hyungcheol Shin",
note = "Publisher Copyright: {\textcopyright} 2017 JSAP.; 22nd Silicon Nanoelectronics Workshop, SNW 2017 ; Conference date: 04-06-2017 Through 05-06-2017",
year = "2017",
month = dec,
day = "29",
doi = "10.23919/SNW.2017.8242312",
language = "English",
series = "2017 Silicon Nanoelectronics Workshop, SNW 2017",
publisher = "Institute of Electrical and Electronics Engineers Inc.",
pages = "91--92",
booktitle = "2017 Silicon Nanoelectronics Workshop, SNW 2017",
address = "United States",
}