Abstract
Ge nanocrystals have recently been studied to improve next-generation nonvolatile memories (NVMs) by substituting Si or ZnO nanocrystals because of their higher dielectric constants, smaller band gap energies, and stronger size effects in the nanometer range. We propose a new method to fabricate a metal-electrode/oxide/insulator/oxide/semiconductor (MOIOS) structure. We deposited a SiGeO compound on an early-made-tunnel-oxide surface and attempted an appropriate post-thermal oxidation to produce simultaneously a blocking-oxide layer (BOL) and a charge-trap layer (CTL). We point out the crucial points for good memory behavior in the MOIOS structure investigated in this work. Based on the high-quality Ge nanocrystals observed in the CTL with a high-resolution transmission microscope (HRTEM) and the prominent behavior of the memory window opening in the capacitance-voltage (C-V) characteristics, we propose a fabrication process that fulfills those crucial points. Furthermore, the process forms concurrently both a high-quality BOL and a high-quality CTL easily in a single step. We expect the method to lead to cost savings and to improve product efficiency in the fabrication of next-generation NVM structures.
Original language | English |
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Pages (from-to) | 3037-3041 |
Number of pages | 5 |
Journal | Journal of the Korean Physical Society |
Volume | 59 |
Issue number | 5 |
DOIs | |
State | Published - 15 Nov 2011 |
Keywords
- Blocking-oxide layer
- C-V curve
- Charge-trap layer
- HRTEM
- MOIOS
- NVM
- Nc-Ge
- SiGe
- XPS