Abstract
This study presents a modeling approach for the current-voltage (I-V) characteristics of 3D-NAND flash memory using the BSIM-CMG (GEOMOD=3) transistor model combined with a genetic algorithm-based parameter optimization technique. Reference data were extracted from technology computer-aided design (TCAD) simulations for structures with one, three, and five word-line (WL) layers, and these data were utilized to optimize the parameters of the BSIM-CMG model. The results demonstrate that the I-V characteristics of 3D-NAND strings with up to 500 layers can be effectively represented, capturing variations in the I-V curves depending on the WL position on both linear and logarithmic scales. Furthermore, the current-voltage characteristics of tapered channel hole structures were successfully modeled. This work provides a robust framework for accurately simulating the electrical behavior of advanced 3D-NAND flash memory devices.
| Original language | English |
|---|---|
| Pages (from-to) | 420-426 |
| Number of pages | 7 |
| Journal | Journal of Semiconductor Technology and Science |
| Volume | 25 |
| Issue number | 4 |
| DOIs | |
| State | Published - 2025 |
Keywords
- 3D-NAND
- BSIM-CMG
- compact modeling
- genetic algorithm
- I-V modeling
- parameter extraction
- tapered hole