Design of a 180 nm CMOS Neuron Circuit with Soft-Reset and Underflow Allowing for Loss-Less Hardware Spiking Neural Networks

Jaesung Kim, Jung Nam Kim, Yoon Kim, Sungmin Hwang, Minsuk Koo

Research output: Contribution to journalArticlepeer-review

3 Scopus citations

Abstract

Spiking neural networks (SNNs) have been researched as an alternative to reduce the gap with the human brain in terms of energy efficiency, due to their inherent spare event-driven characteristics from a hardware implementation perspective. However, they still face significant challenges in learning, compared to artificial neural networks (ANNs). Recently, several algorithms have been developed to narrow the performance gap between SNNs and ANNs, including features in spiking neurons that can reduce information loss in the membrane potential. Inspired by these advancements, the current study designs and measures a neuron circuit using 180 nm complementary metal-oxide-semiconductor (CMOS) technology to address this information loss. The proposed circuit successfully implements these features, and their performance is validated through simulation based on the measured data.

Original languageEnglish
Article number2300460
JournalAdvanced Intelligent Systems
Volume6
Issue number1
DOIs
StatePublished - Jan 2024

Keywords

  • CMOS integrate-and-fire neuron circuits
  • overthreshold potential retaining
  • spiking neural networks
  • underflow allowing

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