Design of analog front end for mobile fuel gauge applications

Chulkyu Park, Hyojae Kim, Jongkeun Hwang, Kichang Jang, Yeongik Yoo, Joongho Choi

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

Abstract

A high-resolution second-order integrating sigma-delta analog-to-digital converter (ADC) using double-sampled integrators is presented whitch performs two times faster sampling than conventional modulator. The modulator has been designed in a 0.18-um CMOS technology. It acheives a signal-to-noise and distortion ratio (SNDR) of 93.03 dB at a conversion rate of 64 sample/s. Power dissipation is 36μW for a single supply voltage of 2.0V. Active area of prototype ADC is 0.396μm2.

Original languageEnglish
Title of host publicationISOCC 2014 - International SoC Design Conference
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages165-166
Number of pages2
ISBN (Electronic)9781479951260
DOIs
StatePublished - 16 Apr 2015
Event11th International SoC Design Conference, ISOCC 2014 - Jeju, Korea, Republic of
Duration: 3 Nov 20146 Nov 2014

Publication series

NameISOCC 2014 - International SoC Design Conference

Conference

Conference11th International SoC Design Conference, ISOCC 2014
Country/TerritoryKorea, Republic of
CityJeju
Period3/11/146/11/14

Keywords

  • Battery Management IC(BMIC)
  • Double-Sampled Integrator
  • Integrating Sigma-Delta ADC
  • Single-Sampled Integrator

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