Design of wide-bandwidth sigma-delta modulator for wireless transceivers

Jungsu Choi, Kichang Jang, Junsang Lee, Wooju Jeong, Jungeui Park, Jayang Yoon, Seok Lee, Joongho Choi

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

5 Scopus citations

Abstract

This paper presents the design of a continuous-time sigma-delta modulator for wide-bandwidth wireless transceiver applications. Several critical design issues for wide-bandwidth signal processing are covered and novel fast on-chip tuning circuit is proposed for maintaining the frequency response. The designed modulator consists of the 3rd-order single-loop active-RC integrator chain with a 4-bit internal quantizer and dynamic element matching scheme. The modulator of 2MHz bandwidth is fabricated in a 0.18-μm CMOS technology and dissipates 68mW for a supply voltage of 1.8V.

Original languageEnglish
Title of host publicationISIC-2009 - 12th International Symposium on Integrated Circuits, Proceedings
Pages598-601
Number of pages4
StatePublished - 2009
Event12th International Symposium on Integrated Circuits, ISIC-2009 - Singapore, Singapore
Duration: 14 Dec 200916 Dec 2009

Publication series

NameISIC-2009 - 12th International Symposium on Integrated Circuits, Proceedings

Conference

Conference12th International Symposium on Integrated Circuits, ISIC-2009
Country/TerritorySingapore
CitySingapore
Period14/12/0916/12/09

Fingerprint

Dive into the research topics of 'Design of wide-bandwidth sigma-delta modulator for wireless transceivers'. Together they form a unique fingerprint.

Cite this