Abstract
Recently, hardware-based neural network using memristive devices, so called neuromorphic system, has been extensively studied. Especially, on-chip (in situ) learning methods where training occurs inside hardware structure itself have been proposed and optimized based on memristor crossbar arrays regarding the linearity of weight-update characteristics. In this study, we analyze the effect of conductance overlap region of memristor on the recognition accuracy for on-chip learning simulation. The effect of conductance overlap region on recognition accuracy for modified national institute of standards and technology (MNIST) dataset is studied with an identical potentiation/depression pulse applied to Pt/Al2O3/TiOx/Ti/Pt stacked memristor. The overlap range can be varied by different pulse amplitude, and the training characteristics of memristive neural network is significantly dependent on the weight-update overlap region.
Original language | English |
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Article number | 111999 |
Journal | Chaos, Solitons and Fractals |
Volume | 157 |
DOIs | |
State | Published - Apr 2022 |
Keywords
- Memristor
- Neural network
- Neuromorphic system
- On-chip learning
- Weight overlap region