Effective Cu filling method to TSV for 3-dimensional Si chip stacking

Sung Chul Hong, Do Hyun Jung, Jae Pil Jung, Wonjoong Kim

Research output: Contribution to journalArticlepeer-review

9 Scopus citations


The effect of current waveform on Cu filling into TSV (through-silicon via) and the bottom-up ratio of Cu were investigated for three dimensional (3D) Si chip stacking. The TSV was prepared on an Si wafer by DRIE (deep reactive ion etching); and its diameter and depth were 30 and 60μm, respectively. SiO 2, Ti and Au layers were coated as functional layers on the via wall. The current waveform was varied like a pulse, PPR (periodic pulse reverse) and 3-step PPR. As experimental results, the bottom-up ratio by the pulsed current decreased with increasing current density, and showed a value of 0.38 on average. The bottom-up ratio by the PPR current showed a value of 1.4 at a current density of -5.85 mA/cm 2, and a value of 0.91 on average. The bottom-up ratio by the 3-step PPR current increased from 1.73 to 5.88 with time. The Cu filling by the 3-step PPR demonstrated a typical bottom-up filling, and gave a sound filling in a short time.

Original languageEnglish
Pages (from-to)152-158
Number of pages7
JournalJournal of Korean Institute of Metals and Materials
Issue number2
StatePublished - Feb 2012


  • Bottom-up ratio
  • Defects
  • Electronic materials
  • Plating
  • Scanning electron microscopy (SEM)


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