Effects of equivalent oxide thickness on bandgap-engineered SONOS flash memory

Dong Hua Li, Il Han Park, Seongjae Cho, Jang Gn Yun, Jung Hoon Lee, Doo Hyun Kim, Gil Sung Lee, Yoon Kim, Se Hwan Park, Won Bo Shim, Wandong Kim, Byung Gook Park

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

1 Scopus citations

Abstract

In order to implement more advanced nonvolatile memory device, many studies have been devoted to improve program/erase speed, endurance, and retention characteristics of nitride-based SONOS flash memory. As the CMOS device size shrinks down, the oxide-nitride-oxide (ONO) multi-layer where charge storage takes place in discrete traps in the silicon nitride layer needs the optimization of thickness and material properties in order for the SONOS flash device to follow the CMOS technology development trend. However, the retention characteristics of SONOS flash memory degrade with the scaling of tunnel oxide, although the program/erase speed is enhanced with the decrease of tunnel oxide thickness. To overcome this problem, we adopted the SONOS structures with bandgap-engineered tunnel oxide layer. The bandgap- engineered SONOS flash memory provides faster erase speed and better retention characteristics than the conventional SONOS flash memory in our previous work. In order to identify the limitation of the equivalent oxide thickness (EOT) of the ultra-thin ONO barrier which replaces the single tunnel oxide layer in the conventional SONOS structures, we have controlled the EOT of the ONO barrier by the standard CMOS process and investigated their effects on the program/erase speed, memory window, and data retention characteristics of the bandgap-engineered SONOS flash memory device. As a result, the experimental data show that the ONO has a degree of freedom in the thickness of each layer but the data retention loss should be still considered. The SONOS flash memory with bandgap engineering by adopting the ONO barrier instead of single tunnel oxide layer should have a lower limit of 3 nm as the EOT for both performance and reliability.

Original languageEnglish
Title of host publication2009 IEEE Nanotechnology Materials and Devices Conference, NMDC 2009
Pages255-258
Number of pages4
DOIs
StatePublished - 2009
Event2009 IEEE Nanotechnology Materials and Devices Conference, NMDC 2009 - Traverse City, MI, United States
Duration: 2 Jun 20095 Jun 2009

Publication series

Name2009 IEEE Nanotechnology Materials and Devices Conference, NMDC 2009

Conference

Conference2009 IEEE Nanotechnology Materials and Devices Conference, NMDC 2009
Country/TerritoryUnited States
CityTraverse City, MI
Period2/06/095/06/09

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