TY - GEN
T1 - Electrical characteristics of novel ESD protection devices for I/O and power clamp
AU - Koo, Yong Seo
AU - Lee, Kwang Yeob
AU - Choi, Joong Ho
AU - Lee, Chan Ho
AU - Lee, Yoon Sik
AU - Yang, Yil Suk
PY - 2011
Y1 - 2011
N2 - This paper presents a novel silicon controlled rectifier (SCR)-based (Electrostatic Discharge) ESD protection devices for I/O clamp and power clamp. The proposed ESD protection devices has a high holding voltage and a low tigger voltage characteristic than conventional SCR. These characteristics enable to latch-up immune under normal operating conditions as well as superior full chip ESD protection. Also, the propsed devices can provide area efficiency in comparison to conventional (Gate Grounded NMOS) GGNMOS. The propsed devices are fabricated by using 0.35um BCD (Bipolar-CMOS-DMOS) technology. From the experimental results, the device for Input/Output (I/O) clamp has a trigger voltage of 6.5V, 7.7V and 8.1V with the LG1 of 0.5um, 0.8um and 1um, respectively. And the device for power clamp has a holding voltage of 8V, 10V and 11.3V with the D1 of 4.5um, 5.5um and 7um. Also, the device for I/O clamp has trigger voltage of 7.8V to 8.9V with the gate length (LG1) of 0.5um, 0.8um and 1.0um. Moreover, The proposed devices have high ESD robustness.
AB - This paper presents a novel silicon controlled rectifier (SCR)-based (Electrostatic Discharge) ESD protection devices for I/O clamp and power clamp. The proposed ESD protection devices has a high holding voltage and a low tigger voltage characteristic than conventional SCR. These characteristics enable to latch-up immune under normal operating conditions as well as superior full chip ESD protection. Also, the propsed devices can provide area efficiency in comparison to conventional (Gate Grounded NMOS) GGNMOS. The propsed devices are fabricated by using 0.35um BCD (Bipolar-CMOS-DMOS) technology. From the experimental results, the device for Input/Output (I/O) clamp has a trigger voltage of 6.5V, 7.7V and 8.1V with the LG1 of 0.5um, 0.8um and 1um, respectively. And the device for power clamp has a holding voltage of 8V, 10V and 11.3V with the D1 of 4.5um, 5.5um and 7um. Also, the device for I/O clamp has trigger voltage of 7.8V to 8.9V with the gate length (LG1) of 0.5um, 0.8um and 1.0um. Moreover, The proposed devices have high ESD robustness.
UR - http://www.scopus.com/inward/record.url?scp=79960866673&partnerID=8YFLogxK
U2 - 10.1109/ISCAS.2011.5937721
DO - 10.1109/ISCAS.2011.5937721
M3 - Conference contribution
AN - SCOPUS:79960866673
SN - 9781424494736
T3 - Proceedings - IEEE International Symposium on Circuits and Systems
SP - 937
EP - 940
BT - 2011 IEEE International Symposium of Circuits and Systems, ISCAS 2011
T2 - 2011 IEEE International Symposium of Circuits and Systems, ISCAS 2011
Y2 - 15 May 2011 through 18 May 2011
ER -