Abstract
The metal-ferroelectric-metal-insulator-semiconductor field-effect transistor using the Au/(Bi,La)4Ti3O12(BLT)/Pt/SrTa2O6(STA)/Si structure is prepared. The STA and BLT films are spun-casted by the sol-gel method. The equivalent oxide thickness value of the STA thin film is 5.2 nm and negligibly small hysteresis loops have been observed for the Au/STA/Si structure. The leakage current density is lower than 10- 7 A/cm2 under 6 V. The remanent polarization of the 420 nm-thick BLT film was 35.2 μC/cm2 at 450 kV/cm. The Au/BLT/Pt/STA/Si MFMIS-FET was fabricated with different area ratio (AI/AF) from 1 to 8. From the drain current-gate voltage characteristics at the drain voltage of 0.2 V, the memory window is only 0.5 V for the device with AI/AF = 1 but it is increased to 1.8 V as the AI/AF is increased to 8. For the AI/AF ratio of 4, the drain current of 1.2×10- 5 A rapidly drops after 1.4×104 s to 4×10- 6 A. The retention time improves as the AI/AF ratio is increased to 8 and it has been found to drop after 8.5×104 seconds.
Original language | English |
---|---|
Pages (from-to) | 639-645 |
Number of pages | 7 |
Journal | Ferroelectrics |
Volume | 385 |
Issue number | 1 PART 6 |
DOIs | |
State | Published - 2009 |
Event | 6th Asian Meeting on Ferroelectrics, AMF-6 - Taipei, Taiwan, Province of China Duration: 2 Aug 2008 → 6 Aug 2008 |
Keywords
- FeFET, retention time
- MFMIS structure