TY - JOUR
T1 - ETS
T2 - Efficient Task Scheduler for Per-Core DVFS Enabled Multicore Processors
AU - Hong, Jeongkyu
N1 - Publisher Copyright:
Copyright © The Korea Institute of Information and Communication Engineering
PY - 2020
Y1 - 2020
N2 - Recent multi-core processors for smart devices use per-core dynamic voltage and frequency scaling (DVFS) that enables independent voltage and frequency control of cores. However, because the conventional task scheduler was originally designed for per-core DVFS disabled processors, it cannot effectively utilize the per-core DVFS and simply allocates tasks evenly across all cores to core utilization with the same CPU frequency. Hence, we propose a novel task scheduler to effectively utilize percore DVFS, which enables each core to have the appropriate frequency, thereby improving performance and decreasing energy consumption. The proposed scheduler classifies applications into two types, based on performance-sensitivity and allows a performance-sensitive application to have a dedicated core, which maximizes core utilization. The experimental evaluations with a real off-the-shelf smart device showed that the proposed task scheduler reduced 13.6% of CPU energy (up to 28.3%) and 3.4% of execution time (up to 24.5%) on average, as compared to the conventional task scheduler.
AB - Recent multi-core processors for smart devices use per-core dynamic voltage and frequency scaling (DVFS) that enables independent voltage and frequency control of cores. However, because the conventional task scheduler was originally designed for per-core DVFS disabled processors, it cannot effectively utilize the per-core DVFS and simply allocates tasks evenly across all cores to core utilization with the same CPU frequency. Hence, we propose a novel task scheduler to effectively utilize percore DVFS, which enables each core to have the appropriate frequency, thereby improving performance and decreasing energy consumption. The proposed scheduler classifies applications into two types, based on performance-sensitivity and allows a performance-sensitive application to have a dedicated core, which maximizes core utilization. The experimental evaluations with a real off-the-shelf smart device showed that the proposed task scheduler reduced 13.6% of CPU energy (up to 28.3%) and 3.4% of execution time (up to 24.5%) on average, as compared to the conventional task scheduler.
KW - Dynamic voltage and frequency scaling
KW - Low-power consumption
KW - Multicore processors
KW - Task scheduler
UR - http://www.scopus.com/inward/record.url?scp=85103668047&partnerID=8YFLogxK
U2 - 10.6109/jicce.2020.18.4.222
DO - 10.6109/jicce.2020.18.4.222
M3 - Article
AN - SCOPUS:85103668047
SN - 2234-8255
VL - 18
SP - 222
EP - 229
JO - Journal of Information and Communication Convergence Engineering
JF - Journal of Information and Communication Convergence Engineering
IS - 4
ER -