Abstract
Recent multi-core processors for smart devices use per-core dynamic voltage and frequency scaling (DVFS) that enables independent voltage and frequency control of cores. However, because the conventional task scheduler was originally designed for per-core DVFS disabled processors, it cannot effectively utilize the per-core DVFS and simply allocates tasks evenly across all cores to core utilization with the same CPU frequency. Hence, we propose a novel task scheduler to effectively utilize percore DVFS, which enables each core to have the appropriate frequency, thereby improving performance and decreasing energy consumption. The proposed scheduler classifies applications into two types, based on performance-sensitivity and allows a performance-sensitive application to have a dedicated core, which maximizes core utilization. The experimental evaluations with a real off-the-shelf smart device showed that the proposed task scheduler reduced 13.6% of CPU energy (up to 28.3%) and 3.4% of execution time (up to 24.5%) on average, as compared to the conventional task scheduler.
| Original language | English |
|---|---|
| Pages (from-to) | 222-229 |
| Number of pages | 8 |
| Journal | Journal of Information and Communication Convergence Engineering |
| Volume | 18 |
| Issue number | 4 |
| DOIs | |
| State | Published - 2020 |
UN SDGs
This output contributes to the following UN Sustainable Development Goals (SDGs)
-
SDG 7 Affordable and Clean Energy
Keywords
- Dynamic voltage and frequency scaling
- Low-power consumption
- Multicore processors
- Task scheduler
Fingerprint
Dive into the research topics of 'ETS: Efficient Task Scheduler for Per-Core DVFS Enabled Multicore Processors'. Together they form a unique fingerprint.Cite this
- APA
- Author
- BIBTEX
- Harvard
- Standard
- RIS
- Vancouver