Fabrication and electrical properties of Au/Bi3.35la 0.75Ti3O12/ZrO2/Si structure

Jun Seo Park; Gwang Geun Lee; Byung Eun Park; Chul Ju Kim

doi:10.3938/jkps.51.727

Fabrication and electrical properties of Au/Bi_3.35la _0.75Ti₃O₁₂/ZrO₂/Si structure

Jun Seo Park, Gwang Geun Lee, Byung Eun Park, Chul Ju Kim

School of Electrical and Computer Engineering

University of Seoul

Research output: Contribution to journal › Article › peer-review

2 Scopus citations

Abstract

Metal-ferroelectric-insulator-semiconductor field-effect transistors (MFIS-FETs) with a Bi_3.35La_0.75Ti₃O ₁₂ (BLT) ferroelectric film and a zirconium oxide (ZrO₂) layer were fabricated on p-type Si(100). ZrO₂ and BLT films were prepared by using a sol-gel method and were characterized by using atomic force microscopy (AFM). The memory window width in capacitance-voltage (C-V) curve of the Au/BLT/ZrO₂/Si diode was about 0.9 V for a voltage sweep of ±4 V. The I_D-V_G characteristic of the Au/BLT/ZrO₂/Si MFIS-FET were found to show a hysteresis loop due to the ferroelectric nature of the BLT film. The memory window width of the field-effect transistor was about 0.8 V.

Original language	English
Pages (from-to)	727-730
Number of pages	4
Journal	Journal of the Korean Physical Society
Volume	51
Issue number	2 PART I
DOIs	https://doi.org/10.3938/jkps.51.727
State	Published - Aug 2007

Keywords

MFIS-FET
Sol-gel

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title = "Fabrication and electrical properties of Au/Bi3.35la 0.75Ti3O12/ZrO2/Si structure",

abstract = "Metal-ferroelectric-insulator-semiconductor field-effect transistors (MFIS-FETs) with a Bi3.35La0.75Ti3O 12 (BLT) ferroelectric film and a zirconium oxide (ZrO2) layer were fabricated on p-type Si(100). ZrO2 and BLT films were prepared by using a sol-gel method and were characterized by using atomic force microscopy (AFM). The memory window width in capacitance-voltage (C-V) curve of the Au/BLT/ZrO2/Si diode was about 0.9 V for a voltage sweep of ±4 V. The ID-VG characteristic of the Au/BLT/ZrO2/Si MFIS-FET were found to show a hysteresis loop due to the ferroelectric nature of the BLT film. The memory window width of the field-effect transistor was about 0.8 V.",

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author = "Park, {Jun Seo} and Lee, {Gwang Geun} and Park, {Byung Eun} and Kim, {Chul Ju}",

year = "2007",

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T1 - Fabrication and electrical properties of Au/Bi3.35la 0.75Ti3O12/ZrO2/Si structure

AU - Park, Jun Seo

AU - Lee, Gwang Geun

AU - Park, Byung Eun

AU - Kim, Chul Ju

PY - 2007/8

Y1 - 2007/8

N2 - Metal-ferroelectric-insulator-semiconductor field-effect transistors (MFIS-FETs) with a Bi3.35La0.75Ti3O 12 (BLT) ferroelectric film and a zirconium oxide (ZrO2) layer were fabricated on p-type Si(100). ZrO2 and BLT films were prepared by using a sol-gel method and were characterized by using atomic force microscopy (AFM). The memory window width in capacitance-voltage (C-V) curve of the Au/BLT/ZrO2/Si diode was about 0.9 V for a voltage sweep of ±4 V. The ID-VG characteristic of the Au/BLT/ZrO2/Si MFIS-FET were found to show a hysteresis loop due to the ferroelectric nature of the BLT film. The memory window width of the field-effect transistor was about 0.8 V.

AB - Metal-ferroelectric-insulator-semiconductor field-effect transistors (MFIS-FETs) with a Bi3.35La0.75Ti3O 12 (BLT) ferroelectric film and a zirconium oxide (ZrO2) layer were fabricated on p-type Si(100). ZrO2 and BLT films were prepared by using a sol-gel method and were characterized by using atomic force microscopy (AFM). The memory window width in capacitance-voltage (C-V) curve of the Au/BLT/ZrO2/Si diode was about 0.9 V for a voltage sweep of ±4 V. The ID-VG characteristic of the Au/BLT/ZrO2/Si MFIS-FET were found to show a hysteresis loop due to the ferroelectric nature of the BLT film. The memory window width of the field-effect transistor was about 0.8 V.

KW - MFIS-FET

KW - Sol-gel

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EP - 730

JO - Journal of the Korean Physical Society

JF - Journal of the Korean Physical Society

IS - 2 PART I

ER -

Fabrication and electrical properties of Au/Bi_3.35la _0.75Ti₃O₁₂/ZrO₂/Si structure

Abstract

Keywords

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