Fabrication of 1K-bit 1T2C-type ferroelectric memory cell array

Shuu'ichirou Yamamoto; Toru Ishikawa; Takaaki Fuchikami; Hyun Soo Kim; Kouji Aizawa; Byung Eun Park; Taisuke Furukawa; Hiroshi Ohki; Shin Kikuchi; Hiromasa Hoko; Hiroshi Ishiwara

doi:10.1080/10584580490899389

Fabrication of 1K-bit 1T2C-type ferroelectric memory cell array

Shuu'ichirou Yamamoto
, Toru Ishikawa
, Takaaki Fuchikami
, Hyun Soo Kim
, Kouji Aizawa
, Byung Eun Park
, Taisuke Furukawa
, Hiroshi Ohki
, Shin Kikuchi
, Hiromasa Hoko
, Hiroshi Ishiwara

School of Electrical and Computer Engineering

Research output: Contribution to journal › Article › peer-review

Abstract

A 1K-bit 1T2C-type ferroelectric memory array has been designed and fabricated by combination of a 0.35 μm gate length CMOS process and a 3 μm design rule ferroelectric process. The write and readout operation in a 1K-bit 1T2C-type memory array cell has been confirmed experimentally.

Original language	English
Pages (from-to)	281-286
Number of pages	6
Journal	Integrated Ferroelectrics
Volume	67
DOIs	https://doi.org/10.1080/10584580490899389
State	Published - 2004

Keywords

Cell array
Ferroelectric random access memory (FeRAM)
Non-destructive readout

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10.1080/10584580490899389

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title = "Fabrication of 1K-bit 1T2C-type ferroelectric memory cell array",

abstract = "A 1K-bit 1T2C-type ferroelectric memory array has been designed and fabricated by combination of a 0.35 μm gate length CMOS process and a 3 μm design rule ferroelectric process. The write and readout operation in a 1K-bit 1T2C-type memory array cell has been confirmed experimentally.",

keywords = "Cell array, Ferroelectric random access memory (FeRAM), Non-destructive readout",

author = "Shuu'ichirou Yamamoto and Toru Ishikawa and Takaaki Fuchikami and Kim, \{Hyun Soo\} and Kouji Aizawa and Park, \{Byung Eun\} and Taisuke Furukawa and Hiroshi Ohki and Shin Kikuchi and Hiromasa Hoko and Hiroshi Ishiwara",

year = "2004",

doi = "10.1080/10584580490899389",

language = "English",

volume = "67",

pages = "281--286",

journal = "Integrated Ferroelectrics",

issn = "1058-4587",

publisher = "Taylor and Francis Ltd.",

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TY - JOUR

T1 - Fabrication of 1K-bit 1T2C-type ferroelectric memory cell array

AU - Yamamoto, Shuu'ichirou

AU - Ishikawa, Toru

AU - Fuchikami, Takaaki

AU - Kim, Hyun Soo

AU - Aizawa, Kouji

AU - Park, Byung Eun

AU - Furukawa, Taisuke

AU - Ohki, Hiroshi

AU - Kikuchi, Shin

AU - Hoko, Hiromasa

AU - Ishiwara, Hiroshi

PY - 2004

Y1 - 2004

N2 - A 1K-bit 1T2C-type ferroelectric memory array has been designed and fabricated by combination of a 0.35 μm gate length CMOS process and a 3 μm design rule ferroelectric process. The write and readout operation in a 1K-bit 1T2C-type memory array cell has been confirmed experimentally.

AB - A 1K-bit 1T2C-type ferroelectric memory array has been designed and fabricated by combination of a 0.35 μm gate length CMOS process and a 3 μm design rule ferroelectric process. The write and readout operation in a 1K-bit 1T2C-type memory array cell has been confirmed experimentally.

KW - Cell array

KW - Ferroelectric random access memory (FeRAM)

KW - Non-destructive readout

UR - https://www.scopus.com/pages/publications/33751188938

U2 - 10.1080/10584580490899389

DO - 10.1080/10584580490899389

M3 - Article

AN - SCOPUS:33751188938

SN - 1058-4587

VL - 67

SP - 281

EP - 286

JO - Integrated Ferroelectrics

JF - Integrated Ferroelectrics

ER -

Fabrication of 1K-bit 1T2C-type ferroelectric memory cell array

Abstract

Keywords

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