Fabrication of a Paper Memory Transistor by Using a Solution Process

Min Gee Kim, Dae Hee Han, Soo Yong Kim, Gwang Geun Lee, Kyung Eun Park, Byung Eun Park, Seung Pil Han

Research output: Contribution to journalArticlepeer-review

Abstract

Paper transistors have the advantages of recyclability, high abundance, low cost, disposability, and biodegradability. In this paper, a nonvolatile transistor fabricated on a paper substrate without protective layers by using solution-based methods is presented, and promising performance is reported. The memory window of ferroelectric field-effect transistors is approximately 16 V when the gate voltage is swept from +20 V to -20 V. The on/off ratio is 3.45 × 102, even on the paper substrate. Electrical characteristics of the memory device are not degraded, as compared with those of transistors on rigid substrates fabricated simultaneously.

Original languageEnglish
Pages (from-to)1088-1091
Number of pages4
JournalJournal of the Korean Physical Society
Volume76
Issue number12
DOIs
StatePublished - 1 Jun 2020

Keywords

  • FeFET
  • Flexible device
  • P(VDF-TrFE)
  • P3HT
  • Paper
  • Sol-gel method

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