Fabrication of electroplate Sn-Ag bumps without a lithography process for 3D packaging

A new process of electroplate Sn-Ag bumping without a patterned photo resist (PR) mould on a Si chip for 3-dimensional packaging was investigated. The electroplating characteristics of the Sn-Ag electrolyte and the bump growth were examined. The substrate was a Si die with a thickness of 70 μm in which the through-Si-vias (TSVs) were plugged with Cu. The Sn-Ag bumps were electroplated on the Cu-plugged vias of the Si-chip with an increasing DC current density and plating time. The experimental results of the polarization curve showed that Sn-Ag had two reduction potentials, namely, a Ag reduction starting potential of .0.387 V and a Sn and Ag co-reduction potential of .0.474 V. The Sn-Ag bumps were fabricated successfully without serious defects by electroplating without a PR mould. The bump height and width increased to 14.5 and 72.0 μm, respectively, when the plating time was raised to 15 min. The growth of the bump width was caused by the absence of the PR mould. The Sn-Ag bump exhibited rivet-head morphology in 15 min plating, and no short circuit between neighboring bumps was found. The near eutectic composition of Sn-3.24 wt%Ag bump was obtained by plating at .30 mA/cm² for 15 min.