Abstract
As MpSoC has become an effective solution to ever-increasing design complexity of modern embedded systems, fast and accurate cosimulation of such system is becoming a touch challenge. Cosimulation performance is inverse proportion to the number of processor simulator in conventional cosimulation frameworks with lock-step synchronization, scheme. To overcome this problem, we propose a novel time synchronization technique called trace-driven virtual synchronization. Having separate phases of event generation and event alignment in the cosimulation, time synchronization overhead is reduced to almost zero, boosting cosimulation speed while accuracy is almost preserved. In addition, this technique enables (1) a fast mixed level cosimulation where different abstraction level simulators are easily integrated communicating with traces and (2) a distributed parallel cosimulation where each simulator can run at its full speed without synchronizing with other simulator too frequently. We compared the performance and the accuracy with MaxSim, a well-known commercial SystemC simulation framework, and the proposed framework showed 11 times faster performance for H.263 decoder example, while the error was below 5%.
| Original language | English |
|---|---|
| Pages (from-to) | 2186-2199 |
| Number of pages | 14 |
| Journal | IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems |
| Volume | 26 |
| Issue number | 12 |
| DOIs | |
| State | Published - Dec 2007 |
Keywords
- HW/SW cosimulation
- MPSoC
- Parallel simulation
- System simulation
- SystemC
- Virtual synchronization
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