TY - GEN
T1 - High-bandwidth Control Structure for Solid-State-Transformers with EtherCAT Protocol
AU - Kim, Dong Uk
AU - Lee, Jaehong
AU - Lee, Seung Hwan
AU - Kim, Sungmin
N1 - Publisher Copyright:
© 2023 The Korean Institute of Power Electronics.
PY - 2023
Y1 - 2023
N2 - This paper proposes a high-bandwidth control structure for solid-state-transformers (SSTs). To fabricate a medium-voltage (MV, 25 kVrms) SST, a 42-level AC/DC rectifier and forty-two dual-active-bridge (DAB) converters are required. However, it is challenging to simultaneously control these converters due to synchronization, propagation delay, and complexity. In this paper, an optimized structure for MV high-level SST controller is proposed. An industrial EtherCAT master PC and state-of-the-art micro-control-units (MCUs) TMS320F28388D are employed to fabricate the control environment. Using the serial-peripheral-interface (SPI) and EtherCAT protocols, a 10 kHz bandwidth data communication between controllers was achieved within a 100 μs delay. Based on the fast communication environment, a partially decentralized voltage balance control scheme, which reduces communication data size, is presented. The proposed controller is evaluated with a PLECS simulation model of the 42-level SST system.
AB - This paper proposes a high-bandwidth control structure for solid-state-transformers (SSTs). To fabricate a medium-voltage (MV, 25 kVrms) SST, a 42-level AC/DC rectifier and forty-two dual-active-bridge (DAB) converters are required. However, it is challenging to simultaneously control these converters due to synchronization, propagation delay, and complexity. In this paper, an optimized structure for MV high-level SST controller is proposed. An industrial EtherCAT master PC and state-of-the-art micro-control-units (MCUs) TMS320F28388D are employed to fabricate the control environment. Using the serial-peripheral-interface (SPI) and EtherCAT protocols, a 10 kHz bandwidth data communication between controllers was achieved within a 100 μs delay. Based on the fast communication environment, a partially decentralized voltage balance control scheme, which reduces communication data size, is presented. The proposed controller is evaluated with a PLECS simulation model of the 42-level SST system.
KW - EtherCAT
KW - controller
KW - high-voltage isolation
KW - solid state transformer
UR - http://www.scopus.com/inward/record.url?scp=85170645619&partnerID=8YFLogxK
U2 - 10.23919/ICPE2023-ECCEAsia54778.2023.10213674
DO - 10.23919/ICPE2023-ECCEAsia54778.2023.10213674
M3 - Conference contribution
AN - SCOPUS:85170645619
T3 - ICPE 2023-ECCE Asia - 11th International Conference on Power Electronics - ECCE Asia: Green World with Power Electronics
SP - 1843
EP - 1848
BT - ICPE 2023-ECCE Asia - 11th International Conference on Power Electronics - ECCE Asia
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 11th International Conference on Power Electronics - ECCE Asia, ICPE 2023-ECCE Asia
Y2 - 22 May 2023 through 25 May 2023
ER -