High efficiency envelope tracking LDMOS power amplifier for W-CDMA

P. Draxler; S. Lanfranco; D. Kimball; C. Hsia; J. Jeong; J. Van De Sluis; P. M. Asbeck

doi:10.1109/MWSYM.2006.249605

High efficiency envelope tracking LDMOS power amplifier for W-CDMA

P. Draxler, S. Lanfranco, D. Kimball, C. Hsia, J. Jeong, J. Van De Sluis, P. M. Asbeck

School of Electrical and Computer Engineering

Research output: Contribution to journal › Conference article › peer-review

58 Scopus citations

Abstract

A high performance W-CDMA base station power amplifier is presented, which uses an envelope tracking bias system along with an advanced 0.4um gate length LDMOS transistor, to achieve high efficiency. High linearity is also achieved by employing digital predistortion. For a target WCDMA envelope with a peak-to-average power ratio of 7.6 dB, the measured overall power-added efficiency (PAE) is as high as 40.4 %. Within this system, the RF power amplifier has an average Drain Efficiency of approximately 64%, and the envelope amplifier has about 60% efficiency. After the memoryless digital predistortion the normalized power RMS error is 3.3%, at an average output power of 27 W and gain of 14.9 dB. After memory mitigation the normalized power RMS error drops to below 1.0%. The efficiency ranks among the highest reported for a single stage LDMOS W-CDMA base station amplifier.

Original language	English
Article number	4015227
Pages (from-to)	1534-1537
Number of pages	4
Journal	IEEE MTT-S International Microwave Symposium Digest
DOIs	https://doi.org/10.1109/MWSYM.2006.249605
State	Published - 2006
Event	2006 IEEE MTT-S International Microwave Symposium Digest - San Francisco, CA, United States Duration: 11 Jun 2006 → 16 Jun 2006

Keywords

Base station power amplifier
Digital predistortion
Efficiency
Envelope tracking
LDMOS
W-CDMA

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10.1109/MWSYM.2006.249605

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title = "High efficiency envelope tracking LDMOS power amplifier for W-CDMA",

abstract = "A high performance W-CDMA base station power amplifier is presented, which uses an envelope tracking bias system along with an advanced 0.4um gate length LDMOS transistor, to achieve high efficiency. High linearity is also achieved by employing digital predistortion. For a target WCDMA envelope with a peak-to-average power ratio of 7.6 dB, the measured overall power-added efficiency (PAE) is as high as 40.4 %. Within this system, the RF power amplifier has an average Drain Efficiency of approximately 64%, and the envelope amplifier has about 60% efficiency. After the memoryless digital predistortion the normalized power RMS error is 3.3%, at an average output power of 27 W and gain of 14.9 dB. After memory mitigation the normalized power RMS error drops to below 1.0%. The efficiency ranks among the highest reported for a single stage LDMOS W-CDMA base station amplifier.",

keywords = "Base station power amplifier, Digital predistortion, Efficiency, Envelope tracking, LDMOS, W-CDMA",

author = "P. Draxler and S. Lanfranco and D. Kimball and C. Hsia and J. Jeong and {Van De Sluis}, J. and Asbeck, {P. M.}",

year = "2006",

doi = "10.1109/MWSYM.2006.249605",

language = "English",

pages = "1534--1537",

journal = "IEEE MTT-S International Microwave Symposium Digest",

issn = "0149-645X",

publisher = "Institute of Electrical and Electronics Engineers Inc.",

note = "2006 IEEE MTT-S International Microwave Symposium Digest ; Conference date: 11-06-2006 Through 16-06-2006",

}

TY - JOUR

T1 - High efficiency envelope tracking LDMOS power amplifier for W-CDMA

AU - Draxler, P.

AU - Lanfranco, S.

AU - Kimball, D.

AU - Hsia, C.

AU - Jeong, J.

AU - Van De Sluis, J.

AU - Asbeck, P. M.

PY - 2006

Y1 - 2006

N2 - A high performance W-CDMA base station power amplifier is presented, which uses an envelope tracking bias system along with an advanced 0.4um gate length LDMOS transistor, to achieve high efficiency. High linearity is also achieved by employing digital predistortion. For a target WCDMA envelope with a peak-to-average power ratio of 7.6 dB, the measured overall power-added efficiency (PAE) is as high as 40.4 %. Within this system, the RF power amplifier has an average Drain Efficiency of approximately 64%, and the envelope amplifier has about 60% efficiency. After the memoryless digital predistortion the normalized power RMS error is 3.3%, at an average output power of 27 W and gain of 14.9 dB. After memory mitigation the normalized power RMS error drops to below 1.0%. The efficiency ranks among the highest reported for a single stage LDMOS W-CDMA base station amplifier.

AB - A high performance W-CDMA base station power amplifier is presented, which uses an envelope tracking bias system along with an advanced 0.4um gate length LDMOS transistor, to achieve high efficiency. High linearity is also achieved by employing digital predistortion. For a target WCDMA envelope with a peak-to-average power ratio of 7.6 dB, the measured overall power-added efficiency (PAE) is as high as 40.4 %. Within this system, the RF power amplifier has an average Drain Efficiency of approximately 64%, and the envelope amplifier has about 60% efficiency. After the memoryless digital predistortion the normalized power RMS error is 3.3%, at an average output power of 27 W and gain of 14.9 dB. After memory mitigation the normalized power RMS error drops to below 1.0%. The efficiency ranks among the highest reported for a single stage LDMOS W-CDMA base station amplifier.

KW - Base station power amplifier

KW - Digital predistortion

KW - Efficiency

KW - Envelope tracking

KW - LDMOS

KW - W-CDMA

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U2 - 10.1109/MWSYM.2006.249605

DO - 10.1109/MWSYM.2006.249605

M3 - Conference article

AN - SCOPUS:33847698909

SN - 0149-645X

SP - 1534

EP - 1537

JO - IEEE MTT-S International Microwave Symposium Digest

JF - IEEE MTT-S International Microwave Symposium Digest

M1 - 4015227

T2 - 2006 IEEE MTT-S International Microwave Symposium Digest

Y2 - 11 June 2006 through 16 June 2006

ER -

High efficiency envelope tracking LDMOS power amplifier for W-CDMA

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Keywords

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