Impact Ionization and Hot-Carrier Degradation in Saddle-Fin and Buried-Gate Transistor of Dynamic Random Access Memory at Cryogenic Temperature

Jun Park, Namhyun Lee, Gang Jun Kim, Hyun Seok Choi, Dae Hwan Kim, Changhyun Kim, Myounggon Kang, Yoon Kim

Research output: Contribution to journalArticlepeer-review

4 Scopus citations

Abstract

Impact ionization and hot-carrier degradation (HCD) in buried-channel-array transistors (BCATs), which are used as the cell transistor, were investigated using sub-30 nm DRAM technology. The impact ionization rate was calculated by measuring the substrate current at different measurement conditions and modeled using an energy-driven model, which is suitable for short-channel transistors. In addition, HCD in BCAT under various operation conditions was analyzed. A multitrap-based approach, in which both interface- and oxide-trap generation were considered, was used to fit the experimental results. Our analysis and modeling results are useful in understanding and predicting the reliability of dynamic random access memory.

Original languageEnglish
Article number9393379
Pages (from-to)653-656
Number of pages4
JournalIEEE Electron Device Letters
Volume42
Issue number5
DOIs
StatePublished - May 2021

Keywords

  • DRAM cell transistor
  • DRAM reliability
  • Hot-carrier degradation
  • buried-channel-array transistor
  • cryogenic computing system
  • impact ionization

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