Improving read disturb characteristics by using double common source line and dummy switch architecture in multi level cell NAND flash memory with low power consumption

Myounggon Kang, Ki Tae Park, Youngsun Song, Youngho Lim, Kang Deog Suh, Hyungcheol Shin

Research output: Contribution to journalArticlepeer-review

9 Scopus citations

Abstract

Two new NAND structures using double common source line (CSL) and dummy switch and their read operation schemes as a solution for NAND flash memories have been proposed. Compared with conventional scheme, the proposed read schemes improves read disturb characteristicsbeyond sub-30nm technology node. By using proposed read scheme, the number of fail bits of proposed NAND was decreased than those ofconventional NAND at read cycles. Also, it was proven that they contribute to improve the performance and suppress the power consumption. The proposed NAND was verified by both simulation and experimental measurements in a fabricated 40nm multi level cell (MLC) NAND device.

Original languageEnglish
Article number04DD03
JournalJapanese Journal of Applied Physics, Part 1: Regular Papers and Short Notes and Review Papers
Volume50
Issue number4 PART 2
DOIs
StatePublished - Apr 2011

Fingerprint

Dive into the research topics of 'Improving read disturb characteristics by using double common source line and dummy switch architecture in multi level cell NAND flash memory with low power consumption'. Together they form a unique fingerprint.

Cite this