Abstract
The localized thermal effect caused by the self-heating effect (SE) becomes important for nanoscale 3-D transistors such as bulk FinFET because the thermal coupling from substrate is critical in such 3-D transistors. In this brief, we analyze the SE in 5-nm bulk FinFETs that are scaled down, following the International Technology Roadmap for Semiconductors. We systematically analyze the impact of key device parameters of bulk FinFET in view of the SE. Since the SE affects performance and reliability of transistors simultaneously, we define new figures of merit including ac delay and bias temperature instability for the first time, and it is found that the proper source/drain contact scheme design can achieve performance and reliability improvement at the same time in 5-nm bulk FinFET technology.
Original language | English |
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Article number | 8098605 |
Pages (from-to) | 5284-5287 |
Number of pages | 4 |
Journal | IEEE Transactions on Electron Devices |
Volume | 64 |
Issue number | 12 |
DOIs | |
State | Published - Dec 2017 |
Keywords
- 3-D transistor
- electrothermal behavior
- FinFET
- International Technology Roadmap for Semiconductors (ITRS)
- self-heating effect (SE)